
3
ML4790
Storage Temperature Range .................... –65
°
C to +150
°
C
Lead Temperature (Soldering 10s)..........................+260
°
C
Thermal Resistance (
θ
JA
)
Plastic SOIC ....................................................110
°
C/W
OPERATING CONDITIONS
Temperature Range
ML4790CS-X ............................................ 0
°
C to +70
°
C
ML4790ES-X......................................... –20
°
C to +70
°
C
V
IN
Range
ML4790CS-X ................................................ 1.0V to 6V
ML4790ES-X................................................. 1.1V to 6V
V
OUT
Range.................................................. 2.5V to 5.5V
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
V
BOOST
........................................................................ 7V
Voltage on Any Other Pin ...GND –0.3V to V
BOOST
+0.3V
Peak Switch Current (I
PEAK
) .......................................... 1A
Average Switch Current (I
AVG
)............................... 500mA
LDO Output Current ............................................. 250mA
Junction Temperature .............................................. 150
°
C
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, V
IN
= Operating Voltage Range, T
A
= Operating Temperature Range. (Note 1)
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNITS
Supply
V
IN
Current
V
IN
= 6V
60
75
μ
A
SHDN = high
15
25
μ
A
V
OUT
Quiescent Current
V
BOOST
= V
OUT
+ 0.5V
8
10
μ
A
V
L
Quiescent Current
1
μ
A
PFM Regulator
Pulse Width (T
ON
)
4.5
5
5.5
μ
s
LDO
SENSE Comparator Threshold Voltage
194
200
206
mV
Load Regulation
See Figure 1
V
IN
= 1.2V, I
OUT
< 10mA
V
IN
= 2.4V, I
OUT
< 75mA
4.85
4.85
5.0
5.0
5.15
5.15
V
V
Dropout Voltage
See Figure 1
V
IN
= 1.2V, I
OUT
< 10mA
V
IN
= 2.4V, I
OUT
< 75mA
300
500
mV
mV
Output Ripple
5
mV
P-P
Shutdown
SHDN Threshold
0.5
0.8
1.0
V
SHDN Bias Current
–100
100
nA
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
Figure 1. Application Test Circuit
ML4790
33
μ
F
V
IN
22
μ
H
(Sumida CD54)
V
OUT
V
IN
GND
SENSE
V
OUT
PWR GND
SHDN
V
L
V
BOOST
100
μ
F
I
OUT
100
μ
F
1nF
931k
39.2k