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參數(shù)資料
| 型號： | ML63295A-XXXWA |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC212 |
| 封裝： | 8.25 X 8.20 MM, 0.35 MM HEIGHT, DIE-212 |
| 文件頁數(shù)： | 3/39頁 |
| 文件大?。?/td> | 253K |
| 代理商： | ML63295A-XXXWA |
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FEDL63295A-02
1Semiconductor
ML63295A
10/38
PIN DESCRIPTIONS
The basic functions of each pin of the ML63295A are described in Table 1.
A symbol with a slash “/” denotes a pin that has a secondary function. Refer to Table 2 for secondary functions.
For type, “—” denotes a power supply pin, “I” an input pin, “O” an output pin, and “I/O” an input-output pin.
Table 1 Pin Descriptions (Basic Functions)
Function
Symbol
Pin No.
Pad No.
Type
Description
V
DD
164, 166
199, 201
—
Positive power supply pin
V
SS
6, 144
57, 186
—
Negative power supply pin
V
DD1
145
187
V
DD2
146
188
V
DD4
149
190
V
DD5
150
191
V
DD6
151
192
—
Power supply pins for LCD bias voltage (internally
generated):
Capacitors (1.0
F) should be connected between
these pins and V
SS.
V
DDX1
153
193
—
Positive power supply for low-speed oscillation.
V
DD3
147
189
V
DDX4
157
196
—
Power supply pins for LCD bias voltage generation:
Capacitors (1.0
F) should be connected between
these pins and V
SS.
C1
158
197
C2
159
198
—
V
DDX2
154
194
V
DDX3
155
195
—
Capacitor connection pins for LCD bias voltage
generation:
A capacitor (1.0
F) should be connected between
C1 and C2, and between V
DDX2 and VDDX3.
V
DDI
179
212
—
Positive power supply pin for external interface
(Power supply for input, output, and input-output
ports)
V
DDL
165
200
—
Positive power supply pin for internal logic
(internally generated):
A capacitor (0.1
F) should be connected between
this pin and V
SS.
Power
Supply
V
DDE
167
202
—
Constant voltage output pin:
A capacitor (1.0
F) should be connected between
this pin and V
SS.
XT0
174
208
I
Oscillation
XT1
173
207
O
Low-speed clock oscillation pins:
An option for using crystal oscillation or RC
oscillation is chosen by the mask option.
If the crystal oscillation is chosen, a crystal should
be connected between XT0 and XT1, and capacitor
(C
G) should be connected between XT0 and VSS.
If the RC oscillation is chosen, external oscillation
resistor (R
OSL) should be connected between XT0
and XT1.
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