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Chapter 9
16-bit Timer
IX - 46
Event Count
9.5.2
Setup Example
■ Event Count Setup Example
If the rising edge of the TM8BIO input pin is detected 5 times with the timer 8, an interrupt is generated. An
example setup procedure, with a description of each step is shown below.
Setup Procedure
Description
(1) Stop the counter
TM8MD(0x0000A200)
bp6: TMLDE=0
bp7: TMCNE=0
(1) Set the TMLDE flag and TMCNE flag of the timer 8
mode register (TM8MD) to “0” to stop the timer 8
counting.
(2) Disable the interrupt
G7ICR(0x0000891C)
bp8: G7IE1=0
(2) Set the G7IE1 flag of the G7ICR register to “0” to disable
the interrupt.
(3) Set the interrupt generation cycle
TM8CA(0x0000A208)=0x0004
(3) Set the interrupt generation cycle to the timer 8
compare/capture register (TM8CA). The setting value
is 4(0x0004) due to 5 times.
(4) Select the count clock source
TM8MD(0x0000A200)
bp2-0: TMCK2-0=111
(4) Select the count clock source(TM8BIO pin) by the
TMCK2-0 flag of the TM8MD register.
(5) Select the timer up/down
TM8MD(0x0000A200)
bp9-8: TMUD1-0=00
(5) Select the timer up count by the TMUD1-0 flag of the
TM8MD register.
(6) Set the timer counter clear enabled
TM8MD(0x0000A200)
bp11: TMCLE=1
(6) Set the TMCLE flag of the TM8MD register to “1” to
enable the clear operation of the TM8BC counter.
When the TM8CA register and the TM8BC counter
match, the TM8BC counter is cleared.
(7) Select the timer compare/capture A
operation mode
TM8MDA(0x0000A204)
bp7-6: TMAM1-0=00
(7) Set the function of the timer 8 compare/capture register
to the compare register (double buffer ) by the TMAM1
-0 flag of the timer 8 compare/capture A mode register
(TM8MDA).
(8) Select the timer B pin polarity
TM8MDB(0x0000A205)
bp5: TMBEG=0
(8) Set the edge (rising edge or falling edge) at single edge
of the input pin of the count clock source to “0” by the
TMBEG flag of the timer 8 compare/capture B mode
register(TM8MDB); then, set the rising edge.
(9) Initialize the timer 8
TM8MD(0x0000A200)
bp6: TMLDE=1
(9) Set the TMLDE flag of the TM8MD register to “1” to
initialize the binary counter. Reset the TMLDE flag to
“0” after setting.
(10) Set the interrupt level
G7ICR(0x0000891C)
bp14-12: G7LV2-0=100
(10) Set the interrupt level by the G7LV2-0 flag of the G7ICR
register. If the interrupt request flag has been set
already , clear the request flag.