參數(shù)資料
型號(hào)： ML670100
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： OKIs High-Performance CMOS 32-Bit Single Chip Microcontroller
中文描述： 歐凱思高性能CMOS 32位單片微控制器
文件頁(yè)數(shù)： 4/27頁(yè)
文件大小： 109K
代理商： ML670100
Semiconductor
PIN DESCRIPTIONS
ML 670100
/ 27
4
Type
Signal
Name
XA23 -
XA16
XA15 -
XA0
I/O Direction Description
Address
bus
Output
These are bits 23-16 of the external address bus. They represent
secondary functions for I/O port PIO0[7:0].
These are bits 15 - 0 of the external address bus.
Output
Data bus XD15 -
XD8
XD7- -XD0 Bidirectional These are bits 7-0 of the external data bus.
nCS0
Output
This output is the chip select signal for bank 0.
nCS1
Output
This output is the chip select signal for bank 1. It represents a
secondary function for I/O port PIO2[6].
nRD
Output
This output is the read signal for SRAM banks (0 and 1).
nWRL
Output
This output is the Write Enable Low signal for SRAM banks (0
and 1).
nWRH
Output
This output is the Write Enable High signal for SRAM banks (0
and 1). It represents a secondary function for I/O port
PIO2[5].
nWRE
Output
This output is the Write Enable signal for SRAM banks (0 and
1).
nLB
Output
This output is the Low Byte Select signal for SRAM banks (0
and 1).
nHB
Output
This output is the High Byte Select signal for SRAM banks (0
and 1). It represents a secondary function for I/O port PIO2[5].
nRAS0
Output
This output is the Row Address Strobe signal for bank 2.
It represents a secondary function for I/O port PIO2[2].
nRAS1
Output
This output is the Row Address Strobe signal for banks 3.
It represents a secondary function for I/O port PIO2[4].
nCASL
Output
This output is the Column Address Strobe Low signal for
DRAM banks (2 and 3). It represents a secondary function for
I/O port PIO2[1].
nCASH
Output
This output is the Column Address Strobe High signal for
DRAM banks (2 and 3). It represents a secondary function for
I/O port PIO2[3].
nWE
Output
This output is the Write Enable signal for DRAM banks (2 and
3). It represents a secondary function for I/O port PIO2[0].
nCAS
Output
This output is the Column Address Strobe signal for DRAM
banks (2 and 3). It represents a secondary function for I/O port
PIO2[1].
nWH
Output
This output is the Write Enable High signal for DRAM banks
(2 and 3). It represents a secondary function for I/O port
PIO2[3].
nWL
Output
This output is the Write Enable Low signal for DRAM banks (2
and 3). It represents a secondary function for I/O port PIO2[0].
nXWAIT
Input
This input pin controls insertion of wait cycles. It represents a
secondary function for I/O port PIO2[7].
Bidirectional These are bits 15-8 of the external data bus. They represent
secondary functions for I/O port PIO1[7:0].
Bus
control
signals
相關(guān)PDF資料
PDF描述
ML671000 CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller(內(nèi)置USB設(shè)備控制器的32位單芯片微控制器)
ML674000 CMOS 32-Bit ARM-Based General-Purpose Single-Chip Microcontroller(基于ARM的32位CMOS單片機(jī))
ML67Q4003 32-bit ARM-Based General-Purpose Microcontroller(32位ARM通用微控制器)
ML7000 PCM Voice Codec(PCM話音編碼譯碼器)
ML7001 PCM Voice Codec(PCM話音編碼譯碼器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ML6701A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:AIGaAs Laser Diodes emitting light beams around 780nm wavelength
ML6704 制造商:GP Batteries 功能描述:Bulk
ML671000 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:OKI’s CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller
ML671000GA 制造商:OK International 功能描述:CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller
ML672 制造商:PYRAMID 制造商全稱:Pyramid Semiconductor Corporation 功能描述:Quad 2-Input “Nand” Gate
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*