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參數(shù)資料
| 型號： | ML671000 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller(內(nèi)置USB設(shè)備控制器的32位單芯片微控制器) |
| 中文描述： | 的CMOS 32位單片機(jī)具有內(nèi)置的USB設(shè)備控制器（內(nèi)置的USB設(shè)備控制器的32位單芯片微控制器） |
| 文件頁數(shù)： | 10/25頁 |
| 文件大?。?/td> | 261K |
| 代理商： | ML671000 |
FEDL671000-02
1
Semiconductor
ML671000
10/25
Universal Serial Bus (USB) Device Controller
The USB device controller consists of a protocol engine to control the USB communications protocol, DPLL,
status/control, FIFO control, a USB transceiver, etc. The USB device controller conforms to USB spec. 1.1
full-speed (12Mbps) .
-
Supports the 4 types of transfers that are specified by the USB standard.
(control transfer, bulk transfer, isochronous transfer, and interrupt transfer)
-
Remote wakeup function
-
Adaptable to USB bus powered devices
-
4 endpoint addresses
Endpoint FIFO contents and functions
FIFO contents
64 bytes
×
1 (transmit)
64 bytes
×
1 (receive)
64 bytes
×
1 (transmit-receive)
64 bytes
×
2 (transmit-receive)
256 bytes
×
2 (transmit-receive)
Endpoint
Transfer mode
EP0
Control
EP1
EP2
EP3
Bulk, interrupt
Bulk, interrupt, isochronous
Bulk, interrupt, isochronous
External Memory Controller
The external memory controller generates control signals for accessing external memory (ROM, RAM,
DRAM, etc.) and peripheral devices mapped in the external memory space, and arbitrates external bus
requests from external devices.
-
Manages memory by dividing the memory space into 4 banks
2 banks of ROM, SRAM, and I/O
2 banks of DRAM
Each bank has a 16MB address space.
Bus width (8 or 16 bits) and wait cycles can be specified for each bank.
-
ROM, SRAM and I/O can be connected directly.
Outputs a strobe signal for the ROM, SRAM and I/O.
-
DRAM can be connected directly.
Row and column addresses are output as multiplexed signals.
Random access mode or high-speed page mode
Supports CAS before RAS refresh and self-refresh.
Clock Control
The clock controller generates and controls the system clock based on the internal oscillator circuit and phase
locked loop (PLL). It also controls the transitions to and from standby modes (HALT and STOP modes) and
returns to normal operation of mode.
-
It offers a choice of divider ratio for adjusting operating clock frequency to match the load processing.
When using PLL:
2
×
f, f, f/2
Not using PLL:
f, f/2, f/4, f/8
f = input clock frequency
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML671000GA | 制造商:OK International 功能描述:CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller |
| ML672 | 制造商:PYRAMID 制造商全稱:Pyramid Semiconductor Corporation 功能描述:Quad 2-Input “Nand” Gate |
| ML674000 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:32-bit General-purpose, ARM-based Microcontroller |
| ML674000-KIT | 制造商:ROHM Semiconductor 功能描述:CMOS 32-Bit ARM-Based General-Purpose Single-Chip Microcontroller |
| ML674000LA | 制造商:ROHM Semiconductor 功能描述:ML674000LAZ03A |
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