參數(shù)資料
型號(hào): ML67Q4003
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 32-bit ARM-Based General-Purpose Microcontroller(32位ARM通用微控制器)
中文描述: 32位基于ARM通用微控制器(32位ARM的通用微控制器)
文件頁(yè)數(shù): 15/24頁(yè)
文件大?。?/td> 192K
代理商: ML67Q4003
FEDL674001-01
OKI Semiconductor
ML674001/67Q4002/67Q4003
15/24
WDT
Functions as an interval timer or a watch dog timer.
(1) 16-bit timer
(2) Watch dog timer or interval timer mode can be selected
(3) Interrupt or reset generation.
(4) Maximum period: longer than 200 msec
PWM
This LSI contains two channels of PWM (Pulse Width Modulation) function which can change the duty cycle of
a waveform with a constant period. The PWM output resolution is 16 bits for each channel.
Serial Interface
This LSI contains four serial interface.
(1) UART without FIFO
: 1 channel
This is the serial port which performs data transmission, taking a synchronization per character.
Selection of various parameters, such as addition of data length, a stop bit, and a parity bit, is possible.
-
Asynchronous full duplex operation
-
Sampling Rate = Baud rate x 16sample
-
Character Length
: 7, 8 bit
-
Stop Bit Length
: 1, 2 bit
-
Parity
: Even, Odd, none
-
Error Detection
: Parity, Framing, Over run
-
Loop Back Function
: ON/OFF, Parity, framing, Over run Compulsive addition
-
Baud Rate Generation
: Exclusive baud rate generator built-in (8bit counter)
Independent from a bus clock
-
Internal-Baud-Rate-Clock-Stop at the time of HALT Mode.
(2) UART with 16bytes FIFO
: 1channel
Features 16bytes FIFO in both send and receive. Uses the industry standard 16550A ACE
(Asynchronous Communication Element).
-
Asynchronous full duplex operation
-
Reporting function for all status
-
16 Byte Transmission and reception FIFO
-
Transmission, reception, interrupt of line status Data set and Independent FIFO control.
-
Modem control signals
: CTS, DCD, DSR, DTR, RI and RTS
-
Data length
: 5, 6, 7, 8 bit
-
Stop bit length
: 1, 1.5, 2 bit
-
parity
: Even, Odd, none
-
Error Detection
: Parity, Framing, Overrun
-
Baud Rate Generation
: Exclusive baud rate generator built-in
(3) Synchronous serial interface
It is a clock synchronous 8bit serial port
-
selectable 1/8, 1/16 or 1/32 of HCLK frequency.
-
Choose LSB First or MSB First.
-
Choose Master / Slave Mode
-
Transceiver Interruption, Transceiver buffer empty interrupt
-
Loopback Test Function
(4) I2C
Based on the I2C BUS specifications. Operates as a single master device.
-
Communication mode
: Master transmitter /master receiver
-
Transmission Speed
: 100kbps (Standard mode) / 400kbps (Fast mode)
-
Addressing format
: 7 bit / 10 bit
-
Data buffer
: 1 Byte(1step)
-
Communication Voltage
: 2.7V to 3.3V
: 1channel
: 1channel
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