參數(shù)資料
型號(hào): MM54C374J/883B
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 總線收發(fā)器
英文描述: CMOS SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20
封裝: 0.300 INCH, CERAMIC, DIP-20
文件頁數(shù): 11/11頁
文件大小: 190K
代理商: MM54C374J/883B
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Products > Military/Aerospace > Logic > 54C CMOS > MM54C373
MM54C373
TRI-STATE Octal D-Type Latch
Generic P/N 54C373
Contents
General Description
Features
Datasheet
Package Availability, Models, Samples & Pricing
General Description
The MM54C373/MM74C373, MM54C374/MM74C374 are integrated, complementary
MOS (CMOS), 8-bit storage elements with TRI-STATE outputs. These outputs have been
specially designed to drive high capacitive loads, such as one might find when driving a
bus, and to have a fan out of 1 when driving standard TTL. When a high logic level is
applied to the OUTPUT DISABLE input, all outputs go to a high impedance state,
regardless of what signals are present at the other inputs and the state of the storage
elements.
The MM54C373/MM74C373 is an 8-bit latch. When LATCH# ENABLE# is high, the Q
outputs will follow the D inputs. When LATCH# ENABLE# goes low, data at the D inputs,
which meets the set-up and hold time requirements, will be retained at the outputs until
LATCH# ENABLE# returns high again.
The MM54C374/MM74C374 is an 8-bit, D-type, positive-edge triggered flip-flop. Data at
the D inputs, meeting the set-up and hold time requirements, is transferred to the Q outputs
on positive-going transitions of the CLOCK input.
Both the MM54C373/MM74C373 and the MM54C374/MM74C374 are being assembled in
20-pin dual-in-line packages with 0.300[Foot][Minute][Prime] pin centers.
Features
Product Folder
1 of 3
05-Aug-2000 11:34 AM
National P/N MM54C373 - TRI-STATE Octal D-Type Latch
file:////roarer/root/data13/imaging/BIT...04/08032000/NATL/08012000/MM54C373.html
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