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參數(shù)資料
| 型號(hào)： | MMC2114CFCVM33 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MCU 32BIT 33MHZ 196-MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 126 |
| 系列： | MCore |
| 核心處理器： | M210 |
| 芯體尺寸： | 32-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SCI，SPI |
| 外圍設(shè)備： | LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 104 |
| 程序存儲(chǔ)器容量： | 256KB（256K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 196-LBGA |
| 包裝： | 托盤 |
5
MMC2114 MCORE Microcontroller Product Brief
MOTOROLA
Feature List
— Enhanced security feature prevents unauthorized access to contents of FLASH (protects
company IP)
— Single-supply operation (no need for separate, high voltage program/erase supply)
8 Kbytes (MMC2113) or 32 Kbytes (MMC2114) of static random-access memory (SRAM):
— Single cycle byte, half-word (16-bit), and word (32-bit) reads and writes
— Standby power supply support
Serial peripheral interface (SPI):
— Master mode and slave mode with slave select output
— Serial clock with programmable polarity and phase
— Control of SPI operation during wait mode
— Mode fault error ag with CPU interrupt capability
— Wired-OR mode and reduced drive control
— General-purpose input/output (I/O) capability
Two serial communications interfaces (SCI):
— Full-duplex operation
— Standard mark/space non-return-to-zero (NRZ) format
— 13-bit baud rate prescaler
— Programmable 8-bit or 9-bit data format
— Separately enabled transmitter and receiver
— Separate receiver and transmitter CPU interrupt requests
— Two receiver wakeup methods (idle line and address mark)
— Hardware parity checking
— Receiver framing error and 1/16 bit-time noise detection
— Reduced drive control
— General-purpose I/O capability
Two timers:
— Four 16-bit input capture/output compare channels
— 16-bit pulse accumulator
— Pulse widths variable from microseconds to seconds
— Eight selectable timer prescalers
— Toggle-on-overow feature for pulse-width modulation
Queued analog-to-digital converter (QADC):
— Eight analog input channels
— 10-bit resolution ±2 counts accuracy
— Minimum 7 S conversion time
— Programmable input sample time for various source impedances
— Two conversion command queues with a total of 64 entries
— Subqueues possible using pause mechanism
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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