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參數(shù)資料
| 型號： | MMC2114CFCVM33 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT 33MHZ 196-MAPBGA |
| 標準包裝： | 126 |
| 系列： | MCore |
| 核心處理器： | M210 |
| 芯體尺寸： | 32-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SCI，SPI |
| 外圍設(shè)備： | LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 104 |
| 程序存儲器容量： | 256KB（256K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 196-LBGA |
| 包裝： | 托盤 |
6
MMC2114 MCORE Microcontroller Product Brief
MOTOROLA
Feature List
— Queue complete and pause interrupts available on both queues
— Queue pointers indicate current location for each queue execution
— Automated queue modes initiated by external trigger or periodic/interval timer
— Single-scan or continuous-scan of queues
— Output data readable in three formats
— Minimum pin set conguration implemented
— Analog pins congurable as general-purpose I/O
Interrupt controller:
— Up to 43 interrupt sources
— 32 unique programmable priority levels for each interrupt source
— Independent enable/disable of pending interrupts based on priority level
— Normal or fast interrupt request for each priority level
— Maskable interrupts at and below a dened priority level
— Selectable autovectored or vectored interrupt requests
— Vectored interrupts generated based on priority level
— Separate vector number possible for normal and fast interrupts
— Visibility of pending interrupts and interrupt signals to core
— Interrupt wakeup from low-power modes
External interrupts supported:
— Rising/falling edge or level sensitivity
— Software generation of external interrupt event
— Interrupt pins congurable as general-purpose I/O
Two periodic interval timers:
— 16-bit counter with modulus "initial count" register
— Selectable as free running or count down
— 16 selectable prescalers — 20 to 215
Watchdog timer:
— 16-bit counter with modulus "initial count" register
— Pause option for low-power modes
Phase-lock loop (PLL):
— Reference crystal from 2 to 10 MHz
— Low-power modes supported
— Separate clock-out signal
Integrated low-voltage detector (LVD):
— Enabled and disabled under software control
— Internal comparator with bandgap reference threshold
— Selectable reset or interrupt request action
— Optional automatic disabling in low-power stop mode
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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