參數(shù)資料
型號(hào): MP7612
廠(chǎng)商: Exar Corporation
英文描述: Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
中文描述: 八通道12位DAC陣列的D / A轉(zhuǎn)換器與放大器輸出和串行數(shù)據(jù)/地址,以控制邏輯
文件頁(yè)數(shù): 12/20頁(yè)
文件大小: 231K
代理商: MP7612
MP7612
12
Rev. 3.00
PERFORMANCE CHARACTERISTICS
Graph 1. Typical Output Settling Characteristic
V
REF
= 5 V, R
L
= 5K, C
L
= 500pF
11 V
0 V
–11 V
2.5mV
0 V
–2.5mV
V
OUT
V
OUT
Settling
50
μ
s/Division
Graph 1shows the typical output settling characteristic of the MP7610 Family for a RESET
of code transitions. The top graph shows the output voltage transients, while the bottom graph shows the differ-
ence between the output and the ideal output.
ZS
FS
ZS series
Graph 2. Linearity with
V
REF
= 5 V, All DACs, All Codes
相關(guān)PDF資料
PDF描述
MP7612AP Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7612AS Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7612BP Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7612BS Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7613 Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Parallel Data/Address mP Control Logic
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MP7612AP 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7612AS 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7612BP 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7612BS 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Serial Data/Address uP Control Logic
MP7613 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:Octal 12-Bit DAC Array D/A Converter with Output Amplifier and Parallel Data/Address mP Control Logic