參數(shù)資料
型號(hào): MP80C51-36D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PDIP40
文件頁數(shù): 159/170頁
文件大?。?/td> 4133K
代理商: MP80C51-36D
89
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
Where high ADC accuracy is required it is recommended to use ADC Noise Reduction Mode, as described in Sec-
tion 13.7 on page 87. A good system design with properly placed, external bypass capacitors does reduce the
need for using ADC Noise Reduction Mode
13.10 ADC Accuracy Definitions
An n-bit single-ended ADC converts a voltage linearly between GND and V
REF in 2
n steps (LSBs). The lowest code
is read as 0, and the highest code is read as 2
n-1.
Several parameters describe the deviation from the ideal behavior:
Offset: The deviation of the first transition (0x00 to 0x01) compared to the ideal transition (at 0.5 LSB). Ideal
value: 0 LSB.
Figure 13-9. Offset Error
Output Code
VREF Input Voltage
Ideal ADC
Actual ADC
Offset
Error
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