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參數(shù)資料
| 型號： | MP8775AQ |
| 廠商： | MICRO POWER SYSTEMS |
| 元件分類： | ADC |
| 英文描述： | CMOS 20 MSPS, 8-Bit, High Speed Analog-to-Digital Converter |
| 中文描述： | 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO20 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 511K |
| 代理商： | MP8775AQ |
CLK
PIPELINE DELAY
N + 1
N + 2
Sample “N”
t
HL
t
DL
N -- 3
N -- 2
N -- 1
DATA N
DATA
1/FS
t
PWH
t
PWL
Figure 1. MP8775 Timing Diagram
MP8775
4
Rev. 3.01
ELECTRICAL CHARACTERISTICS TABLE (CONT’D)
Description
Symbol
Min
Typ
Max
Units
Conditions
AC PARAMETERS
Differential Gain Error
Differential Phase Error
d
G
d
PH
2
1
%
°
FS = 4 x NTSC
FS = 4 x NTSC
POWER SUPPLIES
Operating Voltage (AV
DD
, DV
DD
)
9
Current (AV
DD
+ DV
DD
)
V
DD
I
DD
5
V
mA
17
25
Does not include ref. current
25
°
C
Notes:
1
Tester measures code transitions by dithering the voltage of the analog input (V
). The difference between the measured and the
ideal code width (V
REF
/256) is the DNL error (Figure 2.). The INL error is the maximum distance (in LSBs) from the best fit line to
any transition voltage (Figure 3.). Accuracy is a function of the sampling rate (FS).
Guaranteed. Not tested.
Specified values guarantee functionality. Refer to other parameters for accuracy.
--1 dB bandwidth is a measure of performance of the A/D input stage (S/H + amplifier). Refer to other parameters for accuracy within
the specified bandwidth.
See V
input equivalent circuit (Figure 4.). Switched capacitor analog input requires driver with low output resistance.
All inputs have diodes to DV
DD
and DGND. Input DC currents will not exceed specified limits for any input voltage between
DGND and DV
DD
.
t
, t
should be limited to >5 ns for best results.
Depends on the RC load connected to the output pin.
AGND and DGND pins are connected through the silicon substrate. Connect together at the package and to the analog ground plane.
Specificationsaresubjecttochangewithoutnotice
2
3
4
5
6
7
8
9
ABSOLUTE MAXIMUM RATINGS (T
A
= +25
°
C unless otherwise noted)
1, 2, 3
V
DD
to GND
V
RT
& V
RB
V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . .
All Inputs
. . . . . . . . . . . . . . . . . . . . .
All Outputs
. . . . . . . . . . . . . . . . . . .
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . .
V
DD
+0.5 to GND --0.5 V
V
DD
+0.5 to GND --0.5 V
V
DD
+0.5 to GND --0.5 V
V
DD
+0.5 to GND --0.5 V
Storage Temperature
Lead Temperature (Soldering 10 seconds)
Package Power Dissipation Rating @ 75
°
C
SOIC, SSOP, PDIP
Derates above 75
°
C
--65 to +150
°
C
+300
°
C
. . . . . . .
. . . . . . . . . . . . . . . . . . .
700 mW
9 mW/
°
C
. . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
Notes:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short
transients outside the supplies of less than 100mA for less than 100
μ
s.
V
DD
refers to AV
DD
and DV
DD
. GND refers to AGND and DGND.
2
3
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