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參數(shù)資料
| 型號(hào)： | MPC5200VR400 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 2/80頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MPU 32BIT 400MHZ PPC 272-PBGA |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 系列： | MPC52xx |
| 核心處理器： | 603e G2 LE |
| 芯體尺寸： | 32-位 |
| 速度： | 400MHz |
| 連通性： | CAN，EBI/EMI，以太網(wǎng)，I²C，IrDA，J1850，SPI，UART/USART，USB |
| 外圍設(shè)備： | AC'97，DMA，I²S，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 56 |
| 程序存儲(chǔ)器類型： | 外部程序存儲(chǔ)器 |
| RAM 容量： | 16K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.42 V ~ 1.58 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 272-BBGA |
| 包裝： | 托盤(pán) |
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MPC5200 Data Sheet, Rev. 4
Electrical and Thermal Characteristics
Freescale Semiconductor
10
where N is the number of output pins switching in a group M, C is the capacitance per pin, VDD_IO is the
IO voltage swing, f is the switching frequency and PIOint is the power consumed by the unloaded IO stage.
The total power consumption of the MPC5200 processor must not exceed the value, which would cause
the maximum junction temperature to be exceeded.
Table 6. Power Dissipation
Core Power Supply (VDD_CORE)
SpecID
Mode
SYS_XTAL/XLB/PCI/IPG/CORE (MHz)
Unit
Notes
33/66/33/33/264
33/132/66/132/396
Typ
Operational
727.5
1080
mW
1,2
NOTES:
1
Typical core power is measured at VDD_CORE = 1.5 V, Tj = 25 C
2
Operational power is measured while running an entirely cache-resident program with floating-point
multiplication instructions in parallel with a continuous PCI transaction via BestComm.
D5.1
Doze
—
600
mW
1,3
3
Doze power is measured with the G2_LE core in Doze mode, the system oscillator, System PLL and Core PLL
are active, all other system modules are inactive
D5.2
Nap
—
225
mW
1,4
4
Nap power is measured with the G2_LE core in Nap mode, the stem oscillator, System PLL and Core PLL are
active, all other system modules are inactive
D5.3
Sleep
—
225
mW
1,5
5
Sleep power is measured with the G2_LE core in Sleep mode, the stem oscillator, System PLL and Core PLL
are active, all other system modules are inactive
D5.4
Deep-Sleep
52.5
mW
1,6
6
Deep-Sleep power is measured with the G2_LE core in Sleep mode, the stem oscillator, System PLL, Core PLL
and all other system modules are inactive
D5.5
PLL Power Supplies (SYS_PLL_AVDD, CORE_PLL_AVDD)
Mode
Typ
Unit
Notes
Typical
2
mW
7
Typical PLL power is measured at SYS_PLL_AVDD = CORE_PLL_AVDD = 1.5 V, Tj = 25 C
D5.6
Unloaded I/O Power Supplies (VDD_IO, VDD_MEM_IO8)
8
IO power figures given in the table represent the worst case scenario. For the mem_io rail connected to 2.5V the
IO power is expected to be lower and bounded by the worst case with VDD_MEM_IO connected to 3.3V.
Mode
Typ
Unit
Notes
Typical
33
mW
9
Unloaded typical I/O power is measured in Deep-Sleep mode at VDD_IO = VDD_MEM_IOSDR= 3.3 V, Tj = 25 C
D5.7
Ptotal Pcore Panalog PIO
++
=
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