參數(shù)資料
型號(hào)： MPC5602BEMLLR
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 60 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-100
文件頁(yè)數(shù)： 14/72頁(yè)
文件大小： 971K
代理商： MPC5602BEMLLR
Electrical characteristics
MPC5604B/C Microcontroller Data Sheet, Rev. 4
Freescale Semiconductor
21
4.7.5
I/O pad current specification
The I/O pads are distributed across the I/O supply segment. Each I/O supply segment is associated to a VDD/VSS supply pair as
described in Table 17.
Table 18 provides I/O consumption figures.
In order to ensure device reliability, the average current of the I/O on a single segment should remain below the IAVGSEG
maximum value.
In order to ensure device functionality, the sum of the dynamic and static current of the I/O on a single segment should remain
below the IDYNSEG maximum value.
Ttr CC D Output transition time output pin
FAST configuration
CL = 25 pF
VDD = 5.0 V ± 10%,
PAD3V5V = 0
—
4
ns
CL = 50 pF
—
6
CL = 100 pF
—
12
CL = 25 pF
VDD = 3.3 V ± 10%,
PAD3V5V = 1
—
4
CL = 50 pF
—
7
CL = 100 pF
—
12
1 V
DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified
2 All values need to be confirmed during device validation.
3 C
L includes device and package capacitances (CPKG < 5 pF).
Table 17. I/O supply segment
Package
Supply segment
1
2
3
4
5
6
208 MAPBGA1
1 208 MAPBGA available only as development package for Nexus2+
Equivalent to 144 LQFP segment pad distribution
MCKO
MDOn/MSEO
144 LQFP
pin20–pin49
pin51–pin99
pin100–pin122 pin 123–pin19
—
100 LQFP
pin16–pin35
pin37–pin69
pin70–pin83
pin 84–pin15
—
Table 16. Output pin transition times (continued)
Symbol
C
Parameter
Conditions1
Value2
Unit
Min
Typ
Max
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC5604BxMG
products
in
208
MAPBGA
packages
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