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| 型號(hào)： | MPC5606SVLQ6R |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-144 |
| 文件頁(yè)數(shù)： | 45/136頁(yè) |
| 文件大?。?/td> | 858K |
| 代理商： | MPC5606SVLQ6R |
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MPC5606S Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
16
16 internal and 8 external channels support
Up to 16 single-ended inputs channels
— All channels configured to have alternate function as general purpose input/output pins
–
10-bit ± 3 counts accuracy (TUE)
External multiplexer support to increase up to 23 channels
— Automatic 1 × 8 multiplexer control
— External multiplexer connected to a dedicated input channel
— Shared register between the 8 external channels
Result register available for every non-multiplexed channel
Configurable Left or Right aligned result format
Supports for one-shot, scan and injection conversion modes
Injection mode status bit implemented on adjacent 16-bit register for each result
— Supports Access to Result and injection status with single 32-bit read
Independently enabling of function for channels:
—Offset Refresh
Conversion Triggering support
— Internal conversion triggering from periodic interrupt timer (PIT)
4 configurable analog comparator channels offering range comparison with triggered alarm
— Greater than
— Less than
— Out of range
All unused analog inputs can be used as general purpose input and output pins
Power Down mode
Optional support for DMA transfer of results
1.6.16
Deserial Serial Peripheral Interface (DSPI)
The deserial serial peripheral interface (DSPI) modules provide a synchronous serial interface for communication between the
MPC5606S MCU and external devices.
The DSPI features the following:
Up to two DSPI modules
Full duplex, synchronous transfers
Master or slave operation
Programmable master bit rates
Programmable clock polarity and phase
End-of-transmission interrupt flag
Programmable transfer baud rate
Programmable data frames from 4 to 16 bits
Up to 6 chip select lines available, depending on package and pin multiplexing, enable 64 external devices to be
selected using external muxing from a single DSPI
8 clock and transfer attributes registers
Chip select strobe available as alternate function on one of the chip select pins for deglitching
FIFOs for buffering up to 4 transfers on the transmit and receive side
General purpose I/O functionality on pins when not used for SPI
Queueing operation possible through use of eDMA
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