參數(shù)資料
型號(hào)： MPC8313ZQADD
廠(chǎng)商： Freescale Semiconductor
文件頁(yè)數(shù)： 32/99頁(yè)
文件大?。?/td> 0K
描述： IC MPU POWERQUICC II PRO 516PBGA
標(biāo)準(zhǔn)包裝： 40
系列： MPC83xx
處理器類(lèi)型： 32-位 MPC83xx PowerQUICC II Pro
速度： 267MHz
電壓： 0.95 V ~ 1.05 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 516-BBGA 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 516-PBGAPGE（27x27）
包裝： 托盤(pán)
配用： MPC8313E-RDB-ND - BOARD PROCESSOR
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
38
Freescale Semiconductor
— The SD_REF_CLK and SD_REF_CLK are internally AC-coupled differential inputs as shown
in Figure 23. Each differential clock input (SD_REF_CLK or SD_REF_CLK) has a 50-
termination to XCOREVSS followed by on-chip AC coupling.
— The external reference clock driver must be able to drive this termination.
— The SerDes reference clock input can be either differential or single-ended. Refer to the
differential mode and single-ended mode description below for further detailed requirements.
The maximum average current requirement that also determines the common mode voltage range:
— When the SerDes reference clock differential inputs are DC coupled externally with the clock
driver chip, the maximum average current allowed for each input pin is 8 mA. In this case, the
exact common mode input voltage is not critical as long as it is within the range allowed by the
maximum average current of 8 mA (refer to the following bullet for more detail), since the
input is AC-coupled on-chip.
— This current limitation sets the maximum common mode input voltage to be less than 0.4 V
(0.4 V/50 = 8 mA) while the minimum common mode input level is 0.1 V above XCOREVSS.
For example, a clock with a 50/50 duty cycle can be produced by a clock driver with output
driven by its current source from 0 to 16 mA (0–0.8 V), such that each phase of the differential
input has a single-ended swing from 0 V to 800 mV with the common mode voltage at 400 mV.
— If the device driving the SD_REF_CLK and SD_REF_CLK inputs cannot drive 50
to
XCOREVSS DC, or it exceeds the maximum input current limitations, then it must be
AC-coupled off-chip.
The input amplitude requirement. This requirement is described in detail in the following sections.
Figure 23. Receiver of SerDes Reference Clocks
9.2.2
DC Level Requirement for SerDes Reference Clocks
The DC level requirement for the MPC8313E SerDes reference clock inputs is different depending on the
signaling mode used to connect the clock driver chip and SerDes reference clock inputs as described
below.
Differential mode
— The input amplitude of the differential clock must be between 400 and 1600 mV differential
peak-to-peak (or between 200 and 800 mV differential peak). In other words, each signal wire
Input
Amp
50
50
SDn_REF_CLK
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8313ZQADDB 功能描述:微處理器 - MPU REV2.1 W/OENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8313ZQADDC 功能描述:微處理器 - MPU 8313 REV2.2 PB NO ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8313ZQAFD 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8313ZQAFDA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8313ZQAFDB 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
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