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| 型號(hào)： | MPC8343CZQAGDX |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA620 |
| 封裝： | 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, PLASTIC, BGA-620 |
| 文件頁數(shù)： | 87/92頁 |
| 文件大?。?/td> | 987K |
| 代理商： | MPC8343CZQAGDX |
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MPC8343E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 6
88
Freescale Semiconductor
Electrical Characteristics
21.1.2
Power Supply Voltage Specification
Table 56 provides the recommended operating conditions for the MPC8343E. Note that the values in
Table 56 are the recommended and tested operating conditions. Proper device operation outside of these
conditions is not guaranteed.
Storage temperature range
TSTG
–55 to 150
°C
Notes:
1. Functional and tested operating conditions are given in Table 56. Absolute maximum ratings are stress ratings only,
and functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device
reliability or cause permanent damage to the device.
2. Caution: MVIN must not exceed GVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms
during power-on reset and power-down sequences.
3. Caution: OVIN must not exceed OVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms
during power-on reset and power-down sequences.
4. Caution: LVIN must not exceed LVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
power-on reset and power-down sequences.
5. (M,L,O)VIN and MVREF may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 37.
6. OVIN on the PCI interface may overshoot/undershoot according to the PCI Electrical Specification for 3.3-V
operation, as shown in Figure 3.
Table 56. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value
Unit
Notes
Core supply voltage
VDD
1.2 V ± 60 mV
V
1
PLL supply voltage
AVDD
1.2 V ± 60 mV
V
1
DDR DRAM I/O supply voltage
GVDD
2.5 V ± 125 mV
V
Three-speed Ethernet I/O supply voltage
LVDD1
3.3 V ± 330 mV
2.5 V ± 125 mV
V
Three-speed Ethernet I/O supply voltage
LVDD2
3.3 V ± 330 mV
2.5 V ± 125 mV
V
PCI, local bus, DUART, system control and power
management, I2C, and JTAG I/O voltage
OVDD
3.3 V ± 330 mV
V
Notes:
1. GVDD, LVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the
positive or negative direction.
Table 55. Absolute Maximum Ratings 1 (continued)
Characteristic
Symbol
Max Value
Unit
Notes
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