參數(shù)資料
型號: MPC8343ECZQADD
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA620
封裝: 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, PLASTIC, BGA-620
文件頁數(shù): 16/84頁
文件大?。?/td> 1428K
代理商: MPC8343ECZQADD
MPC8343E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
23
Ethernet: Three-Speed Ethernet, MII Management
8.2
MII, RGMII, and RTBI AC Timing Specifications
The AC timing specifications for MII, RGMII, and RTBI are presented in this section.
8.2.1
MII AC Timing Specifications
This section describes the MII transmit and receive AC timing specifications.
8.2.1.1
MII Transmit AC Timing Specifications
Table 21 provides the MII transmit AC timing specifications.
Table 20. RGMII/RTBI (When Operating at 2.5 V) DC Electrical Characteristics
Parameters
Symbol
Conditions
Min
Max
Unit
Supply voltage 2.5 V
LVDD
2.37
2.63
V
Output high voltage
VOH
IOH = –1.0 mA
LVDD = Min
2.00
LVDD +0.3
V
Output low voltage
VOL
IOL = 1.0 mA
LVDD = Min
GND – 0.3
0.40
V
Input high voltage
VIH
—LVDD = Min
1.7
LVDD +0.3
V
Input low voltage
VIL
—LVDD = Min
–0.3
0.70
V
Input high current
IIH
VIN
1 = LV
DD
—10
μA
Input low current
IIL
VIN
1 = GND
–15
μA
Note:
1. The symbol VIN, in this case, represents the LVIN symbol referenced in Table 1 and Table 2.
Table 21. MII Transmit AC Timing Specifications
At recommended operating conditions with LVDD/OVDD of 3.3 V ± 10%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
TX_CLK clock period 10 Mbps
tMTX
—400
ns
TX_CLK clock period 100 Mbps
tMTX
—40
ns
TX_CLK duty cycle
tMTXH/tMTX
35
65
%
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
tMTKHDX
1
5
15
ns
TX_CLK data clock rise VIL(min) to VIH(max)
tMTXR
1.0
4.0
ns
TX_CLK data clock fall VIH(max) to VIL(min)
tMTXF
1.0
4.0
ns
Note:
1. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMTKHDX symbolizes MII transmit timing
(MT) for the time tMTX clock reference (K) going high (H) until data outputs (D) are invalid (X). In general, the clock reference
symbol is based on two to three letters representing the clock of a particular function. For example, the subscript of tMTX
represents the MII(M) transmit (TX) clock. For rise and fall times, the latter convention is used with the appropriate letter:
R (rise) or F (fall).
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