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| 型號： | MPC8360CVVAJDGA |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 533 MHz, RISC PROCESSOR, PBGA740 |
| 封裝： | 37.50 X 37.50 MM, 1.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, TBGA-740 |
| 文件頁數(shù)： | 62/102頁 |
| 文件大小： | 606K |
| 代理商： | MPC8360CVVAJDGA |
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MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
62
Freescale Semiconductor
USB DC Electrical Characteristics
19
USB
This section provides the AC and DC electrical specifications for the USB interface of the MPC8360E/58E.
19.1
USB DC Electrical Characteristics
This table provides the DC electrical characteristics for the USB interface.
19.2
USB AC Electrical Specifications
This table describes the general timing parameters of the USB interface of the device.
This figure provide the AC test load for the USB.
Figure 52. USB AC Test Load
Table 64. USB DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
High-level output voltage, IOH = –100 μAVOH
OVDD – 0.4
—
V
Low-level output voltage, IOL = 100 μAVOL
—0.2
V
Input current
IIN
—±10
μA
Table 65. USB General Timing Parameters
Parameter
Symbol1
Min
Max
Unit
Notes
Note
USB clock cycle time
tUSCK
20.83
—
ns
Full speed 48 MHz
—
USB clock cycle time
tUSCK
166.67
—
ns
Low speed 6 MHz
—
Skew between TXP and TXN
tUSTSPN
—5
ns
—
Skew among RXP, RXN, and RXD
tUSRSPND
—
10
ns
Full speed transitions
Skew among RXP, RXN, and RXD
tUSRPND
—
100
ns
Low speed transitions
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(state)(signal) for
receive signals and t(first two letters of functional block)(state)(signal) for transmit signals. For example, tUSRSPND
symbolizes USB timing (US) for the USB receive signals skew (RS) among RXP, RXN, and RXD (PND). Also,
tUSTSPN symbolizes USB timing (US) for the USB transmit signals skew (TS) between TXP and TXN (PN).
2. Skew measurements are done at OVDD/2 of the rising or falling edge of the signals.
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8360CVVAJDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CVVAJFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CVVAJFHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CVVALDGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CVVALDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
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