參數(shù)資料
型號: MPC8378CVRAGD
廠商: Freescale Semiconductor
文件頁數(shù): 44/128頁
文件大?。?/td> 0K
描述: MPU POWERQUICC II PRO 689-PBGA
標(biāo)準(zhǔn)包裝: 27
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 689-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 689-TEPBGA II(31x31)
包裝: 托盤
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
22
Freescale Semiconductor
This figure provides AC test load for the DDR bus.
Figure 6. DDR AC Test Load
7DUART
This section describes the DC and AC electrical specifications for the DUART interface of the chip.
7.1
DUART DC Electrical Characteristics
This table provides the DC electrical characteristics for the DUART interface of the device.
7.2
DUART AC Electrical Specifications
this table provides the AC timing parameters for the DUART interface of the device.
Table 22. DUART DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage OVDD
VIL
–0.3
0.8
V
High-level output voltage,
IOH = –100 μA
VOH
OVDD – 0.2
V
Low-level output voltage,
IOL = 100 μA
VOL
—0.2
V
Input current,
(0 V
≤VIN ≤ OVDD)
IIN
—±30
μA
Note: The symbol VIN, in this case, represents the OVIN symbol referenced in Table 2.
Table 23. DUART AC Timing Specifications
Parameter
Value
Unit
Note
Minimum baud rate
256
baud
Maximum baud rate
> 1,000,000
baud
Oversample rate
16
Notes:
1. Actual attainable baud rate will be limited by the latency of interrupt processing.
2. The middle of a start bit is detected as the 8th sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are
sampled each 16th sample.
Output
Z0 = 50 Ω
RL = 50 Ω
GVDD/2
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