參數(shù)資料
型號(hào)： MPC8379ECVRAGDA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 266 MHz, MICROPROCESSOR, PBGA689
封裝： 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689
文件頁數(shù)： 90/114頁
文件大?。?/td> 1337K
代理商： MPC8379ECVRAGDA
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
77
Package and Pin Listings
20.3
SerDes Transmitter and Receiver Reference Circuits
Figure 59 shows the reference circuits for SerDes data lane’s transmitter and receiver.
Figure 59. SerDes Transmitter and Receiver Reference Circuits
The DC and AC specification of SerDes data lanes are defined in each interface protocol section below in
this document based on the application usage:
Note that an external AC coupling capacitor is required for the above three serial transmission protocols
with the capacitor value defined in specification of each protocol section.
21 Package and Pin Listings
This section details package parameters, pin assignments, and dimensions.
21.1
Package Parameters for the MPC8379E TePBGA II
The package parameters are provided in the following list. The package type is 31 mm
× 31 mm,
689 plastic ball grid array (TePBGA II).
Package outline
31 mm
× 31 mm
Interconnects
689
Pitch
1.00 mm
Module height (typical)
2.0 mm to 2.46 mm (maximum)
Solder Balls
3.5% Ag, 96.5% Sn
Ball diameter (typical)
0.60 mm
50
Ω
50
Ω
Receiver
Transmitter
SD1_TX
n or
SD2_TX
n
SD1_TX
n or
SD2_TX
n
SD1_RX
n or
SD2_RX
n
SD1_RX
n or
SD2_RX
n
50
Ω
50
Ω
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