參數(shù)資料
型號： MPC8379EVRAGDA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 266 MHz, MICROPROCESSOR, PBGA689
封裝： 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689
文件頁數(shù)： 72/114頁
文件大?。?/td> 1337K
代理商： MPC8379EVRAGDA
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
60
Freescale Semiconductor
Serial ATA (SATA)
15.2.1
Gen1i/1.5G Transmitter Specifications
Table 51 provides the DC differential transmitter output DC characteristics for the SATA interface at
Gen1i or 1.5 Gbits/s transmission.
Table 52 provides the differential transmitter output AC characteristics for the SATA interface at Gen1i or
1.5 Gbits/s transmission.
15.2.2
Gen2i/3G Transmitter Specifications
Table 53 provides the differential transmitter output DC characteristics for the SATA interface at Gen2i or
3.0 Gbits/s transmission.
Table 51. Gen1i/1.5G Transmitter (Tx) DC Specifications
Parameter
Symbol
Min
Typical
Max
Units
Notes
Tx differential output voltage
VSATA_TXDIFF
400
500
600
mVp-p
1
Tx differential pair impedance
ZSATA_TXDIFFIM
85
100
115
Ω
—
Note:
1 Terminated by 50 Ω load.
Table 52. Gen1i/1.5G Transmitter AC Specifications
Parameter
Symbol
Min
Typical
Max
Units
Notes
Channel speed
tCH_SPEED
—
1.5
—
Gbps
—
Unit interval
TUI
666.4333
666.667
670.2333
ps
—
Total jitter, data-data
5UI
USATA_TXTJ5UI
—
0.355
UIp-p
1
Total jitter, data-data
250 UI
USATA_TXTJ250UI
—
0.47
UIp-p
1
Deterministic jitter, data-data
5UI
USATA_TXDJ5UI
—
0.175
UIp-p
1
Deterministic jitter, data-data
250 UI
USATA_TXDJ250UI
—
0.22
UIp-p
1
Note:
1 Measured at Tx output pins peak to peak phase variation, random data pattern.
Table 53. Gen 2i/3G Transmitter DC Specifications
Parameter
Symbol
Min
Typical
Max
Units
Notes
Tx differential output voltage
VSATA_TXDIFF
400
550
700
mVp-p
1
Tx differential pair impedance
ZSATA_TXDIFFIM
85
100
115
Ω
—
Note:
1 Terminated by 50 Ω load.
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