參數(shù)資料
型號： MPC8533VTARFB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1067 MHz, RISC PROCESSOR, PBGA783
封裝： 29 X 29 MM, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-783
文件頁數(shù)： 82/116頁
文件大?。?/td> 1277K
代理商： MPC8533VTARFB
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 2
68
Freescale Semiconductor
High-Speed Serial Interfaces (HSSI)
Table 52 describes some AC parameters common to SGMII, and PCI Express protocols.
Figure 49. Differential Measurement Points for Rise and Fall Time
Figure 50. Single-Ended Measurement Points for Rise and Fall Time Matching
Table 52. SerDes Reference Clock Common AC Parameters
Parameter
Symbol
Min
Max
Unit
Notes
Rising Edge Rate
Rise Edge Rate
1.0
4.0
V/ns
2, 3
Falling Edge Rate
Fall Edge Rate
1.0
4.0
V/ns
2, 3
Differential Input High Voltage
VIH
+200
—
mV
2
Differential Input Low Voltage
VIL
—
–200
mV
2
Rising edge rate (SD
n_REF_CLK) to falling edge rate
(SD
n_REF_CLK) matching
Rise-Fall Matching
—
20
%
1, 4
Notes:
1. Measurment taken from single ended waveform.
2. Measurment taken from differential waveform.
3. Measured from –200 mV to +200 mV on the differential waveform (derived from SD
n_REF_CLK minus SDn_REF_CLK). The
signal must be monotonic through the measurement region for rise and fall time. The 400 mV measurement window is
centered on the differential zero crossing. See Figure 49.
4. Matching applies to rising edge rate for SD
n_REF_CLK and falling edge rate for SDn_REF_CLK. It is measured using a
200 mV window centered on the median cross point where SD
n_REF_CLK rising meets SDn_REF_CLK falling. The median
cross point is used to calculate the voltage thresholds the oscilloscope is to use for the edge rate calculations. The rise edge
rate of SD
n_REF_CLK should be compared to the fall edge rate of SDn_REF_CLK, the maximum allowed difference should
not exceed 20% of the slowest edge rate. See Figure 50.
VIH = +200 mV
VIL = –200 mV
0.0 V
SD
n_REF_CLK
minus
SD
n_REF_CLK
Fall Edge Rate
Rise Edge Rage
SD
n_REF_CLK
SD
n_REF_CLK
SD
n_REF_CLK
SD
n_REF_CLK
SD
n_REF_CLK
VCROSS MEDIAN
VCROSS MEDIAN + 100 mV
VCROSS MEDIAN – 100 mV
TFALL
TRISE
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