參數(shù)資料
型號： MPC8544AVTANGA
廠商： Freescale Semiconductor
文件頁數(shù)： 90/117頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC III 783-FCBGA
標準包裝： 36
系列： MPC85xx
處理器類型： 32-位 MPC85xx PowerQUICC III
速度： 800MHz
電壓： 0.95 V ~ 1.05 V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 6
74
Freescale Semiconductor
PCI Express
17.4.1
Differential Transmitter (TX) Output
Table 59 defines the specifications for the differential output at all transmitters. The parameters are
specified at the component pins.
Table 59. Differential Transmitter (TX) Output Specifications
Symbol
Parameter
Min
Nom
Max
Unit
Comments
UI
Unit interval
399.88
400
400.12
ps
Each UI is 400 ps ± 300 ppm. UI does not
account for Spread Spectrum Clock
dictated variations. See Note 1.
VTX-DIFFp-p
Differential peak-to-
peak output voltage
0.8
—
1.2
V
VTX-DIFFp-p = 2*|VTX-D+ – VTX-D–|.
See Note 2.
VTX-DE-RATIO
De- emphasized
differential output
voltage (ratio)
–3.0
–3.5
–4.0
dB
Ratio of the VTX-DIFFp-p of the second and
following bits after a transition divided by
the VTX-DIFFp-p of the first bit after a
transition. See Note 2.
TTX-EYE
Minimum TX eye width
0.70
—
UI
The maximum transmitter jitter can be
derived as TTX-MAX-JITTER = 1 – TTX-EYE
= 0.3 UI. See Notes 2 and 3.
TTX-EYE-MEDIAN-to-
MAX-JITTER
Maximum time
between the jitter
median and maximum
deviation from the
median.
—
0.15
UI
Jitter is defined as the measurement
variation of the crossing points (VTX-DIFFp-p
= 0 V) in relation to a recovered TX UI. A
recovered TX UI is calculated over 3500
consecutive unit intervals of sample data.
Jitter is measured using all edges of the
250 consecutive UI in the center of the
3500 UI used for calculating the TX UI. See
Notes 2 and 3.
TTX-RISE, TTX-FALL
D+/D– TX output
rise/fall time
0.125
—
UI
See Notes 2 and 5.
VTX-CM-ACp
RMS AC peak
common mode output
voltage
——
20
mV
VTX-CM-ACp = RMS(|VTXD+ –
VTXD–|/2 – VTX-CM-DC)
VTX-CM-DC = DC(avg) of |VTX-D+ –
VTX-D–|/2
See Note 2.
VTX-CM-DC-ACTIVE-
IDLE-DELTA
Absolute delta of DC
common mode voltage
during LO and
electrical idle
0—
100
mV
|VTX-CM-DC (during LO) – VTX-CM-Idle-DC
(During Electrical Idle)|<= 100 mV
VTX-CM-DC = DC(avg) of |VTX-D+ –
VTX-D–|/2 [LO]
VTX-CM-Idle-DC = DC(avg) of |VTX-D+ –
VTX-D–|/2 [Electrical Idle]
See Note 2.
VTX-CM-DC-LINE-DELTA Absolute delta of DC
common mode
between D+ and D–
0—
25
mV
|VTX-CM-DC-D+ – VTX-CM-DC-D–| <= 25 mV
VTX-CM-DC-D+ = DC(avg) of |VTX-D+|
VTX-CM-DC-D– = DC(avg) of |VTX-D–|
See Note 2.
VTX-IDLE-DIFFp
Electrical idle
differential peak output
voltage
0—
20
mV
VTX-IDLE-DIFFp = |VTX-IDLE-D+ – VTX-IDLE-D–|
<= 20 mV
See Note 2.
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