參數(shù)資料
型號(hào)： MPC8548EVTATGB
廠商： Freescale Semiconductor
文件頁數(shù)： 120/151頁
文件大?。?/td> 0K
描述： MPU POWERQUICC III 783-PBGA
產(chǎn)品培訓(xùn)模塊： MPC8548 PowerQUICC III Processors
標(biāo)準(zhǔn)包裝： 1
系列： MPC85xx
處理器類型： 32-位 MPC85xx PowerQUICC III
速度： 1.2GHz
電壓： 1.1V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
70
Freescale Semiconductor
High-Speed Serial Interfaces (HSSI)
Figure 43 shows the SerDes reference clock connection reference circuits for HCSL type clock driver. It
assumes that the DC levels of the clock driver chip is compatible with SerDes reference clock input’s DC
requirement.
Figure 43. DC-Coupled Differential Connection with HCSL Clock Driver (Reference Only)
Figure 44 shows the SerDes reference clock connection reference circuits for LVDS type clock driver.
Since LVDS clock driver’s common mode voltage is higher than the SerDes reference clock input’s
allowed range (100–400 mV), AC-coupled connection scheme must be used. It assumes the LVDS output
driver features 50-
termination resistor. It also assumes that the LVDS transmitter establishes its own
common mode level without relying on the receiver or other external component.
Figure 44. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
Figure 45 shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with
the SerDes reference clock input’s DC requirement, AC-coupling must be used. Figure 45 assumes that
the LVPECL clock driver’s output impedance is 50
R1 is used to DC-bias the LVPECL outputs prior
50
50
SD_REF_CLK
Clock Driver
100
Differential PWB Trace
Clock driver vendor dependent
source termination resistor
CLK_Out
HCSL CLK Driver Chip
33
33
Total 50
Assume clock driver’s
output impedance is about 16
MPC8548E
CLK_Out
SerDes Refer.
CLK Receiver
Clock Driver
SD_REF_CLK
Clock Driver
100
Differential PWB Trace
CLK_Out
LVDS CLK Driver Chip
10 nF
MPC8548E
SerDes Refer.
CLK Receiver
50
50
Clock Driver
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8548EVTAUJA 制造商:Freescale Semiconductor 功能描述:MPC85XX RISC 32-BIT CMOS 1.333GHZ 1.8V/2.5V/3.3V 783-PIN BGA - Bulk
MPC8548EVTAUJB 功能描述:微處理器 - MPU FG PQ38 8548 PB Free RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548EVTAUJC 功能描述:微處理器 - MPU REV2.1.3 FG Part RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548EVTAUJD 功能描述:微處理器 - MPU PQ38 ST WE 1333 R3.0 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548EVTAVHA 制造商:Freescale Semiconductor 功能描述:MPU RISC 32BIT CMOS 1.5GHZ 1.8V/2.5V/3.3V 783FCCBGA - Bulk
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