參數(shù)資料
型號: MPC8572CVTAVNE
廠商: Freescale Semiconductor
文件頁數(shù): 11/138頁
文件大?。?/td> 0K
描述: MPU POWERQUICC III 1023FCPBGA
標準包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.5GHz
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 1023-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1023-FCPBGA(33x33)
包裝: 托盤
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
108
Freescale Semiconductor
Package Description
SD1_TX[6]
PCIe1 Tx Data Lane 6 / SRIO or
PCIe2 Tx Data Lane 2 / PCIe3
TX Data Lane 0
L24
O
XVDD_SR
DS1
SD1_TX[5]
PCIe1 Tx Data Lane 5 / SRIO or
PCIe2 Tx Data Lane 1
K26
O
XVDD_SR
DS1
SD1_TX[4]
PCIe1 Tx Data Lane 4 / SRIO or
PCIe2 Tx Data Lane 0
J24
O
XVDD_SR
DS1
SD1_TX[3]
PCIe1 Tx Data Lane 3
G24
O
XVDD_SR
DS1
SD1_TX[2]
PCIe1 Tx Data Lane 2
F26
O
XVDD_SR
DS1
SD1_TX[1]
PCIe1 Tx Data Lane 1]
E24
O
XVDD_SR
DS1
SD1_TX[0]
PCIe1 Tx Data Lane 0
D26
O
XVDD_SR
DS1
SD1_TX[7:0]
Transmit Data (negative)
M27, L25, K27, J25,
G25, F27, E25, D27
OXVDD_SR
DS1
SD1_PLL_TPD
PLL Test Point Digital
J32
O
XVDD_SR
DS1
17
SD1_REF_CLK
PLL Reference Clock
H32
I
XVDD_SR
DS1
SD1_REF_CLK
PLL Reference Clock
Complement
H31
I
XVDD_SR
DS1
Reserved
C29, K32
26
Reserved
C30, K31
27
Reserved
C24, C25, H26, H27
28
Reserved
AL20, AL21
29
SerDes (x4) SGMII
SD2_RX[3:0]
Receive Data (positive)
AK32, AJ30, AF30,
AE32
IXVDD_SR
DS2
SD2_RX[3:0]
Receive Data (negative)
AK31, AJ29, AF29,
AE31
IXVDD_SR
DS2
SD2_TX[3]
SGMII Tx Data eTSEC4
AH26
O
XVDD_SR
DS2
SD2_TX[2]
SGMII Tx Data eTSEC3
AG24
O
XVDD_SR
DS2
SD2_TX[1]
SGMII Tx Data eTSEC2
AE24
O
XVDD_SR
DS2
Table 76. MPC8572E Pinout Listing (continued)
Signal
Signal Name
Package Pin Number
Pin Type
Power
Supply
Notes
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