參數(shù)資料
型號: MPC8572ECVTARLB
廠商: Freescale Semiconductor
文件頁數(shù): 86/138頁
文件大?。?/td> 0K
描述: MPU POWERQUICC III 1023-PBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.067GHz
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 1023-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1023-FCPBGA(33x33)
包裝: 托盤
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
51
Ethernet Management Interface Electrical Characteristics
9.2
MII Management AC Electrical Specifications
Table 45 provides the MII management AC timing specifications.There are three sets of Ethernet
management signals (EC1_MDC and EC1_MDIO, EC3_MDC and EC3_MDIO, EC5_MDC and
EC5_MDIO). These are not explicitly shown in the table or in the figure following.
Input low current
(LVDD/TVDD = Max, VIN = 0.5 V)
IIL
–600
μA—
Note:
1. EC1_MDC and EC1_MDIO operate on LVDD.
2. EC3_MDC & EC3_MDIO and EC5_MDC & EC5_MDIO operate on TVDD.
3. Note that the symbol VIN, in this case, represents the LVIN and TVIN symbol referenced in Table 1.
Table 44. MII Management DC Electrical Characteristics (LVDD/TVDD=2.5 V)
Parameters
Symbol
Min
Max
Unit
Notes
Supply voltage 2.5 V
LVDD/TVDD
2.37
2.63
V
1,2
1 EC1_MDC and EC1_MDIO operate on LV
DD.
2 EC3_MDC & EC3_MDIO and EC5_MDC & EC5_MDIO operate on TV
DD.
Output high voltage
(LVDD/TVDD = Min, IOH = –1.0 mA)
VOH
2.00
LVDD/TVDD + 0.3
V
Output low voltage
(LVDD/TVDD = Min, IOL = 1.0 mA)
VOL
GND – 0.3
0.40
V
Input high voltage
VIH
1.70
LVDD/TVDD + 0.3
V
Input low voltage
VIL
–0.3
0.70
V
Input high current
(VIN = LVDD, VIN = TVDD)
IIH
—10
μA
3 Note that the symbol V
IN, in this case, represents the LVIN and TVIN symbols referenced in Table 1.
Input low current
(VIN = GND)
IIL
–15
μA
Note:
Table 45. MII Management AC Timing Specifications
At recommended operating conditions with LVDD/TVDD of 3.3 V ± 5% or 2.5 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
Notes
ECn_MDC frequency
fMDC
0.9
2.5
9.3
MHz
2, 3
ECn_MDC period
tMDC
107.5
1120
ns
ECn_MDC clock pulse width high
tMDCH
32
ns
ECn_MDC to ECn_MDIO delay
tMDKHDX
10
16*tplb_clk
ns
5
ECn_MDIO to ECn_MDC setup time
tMDDVKH
5—
ns
Table 43. MII Management DC Electrical Characteristics (LVDD/TVDD=3.3 V) (continued)
Parameter
Symbol
Min
Max
Unit
Notes
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