參數(shù)資料
型號(hào): MPC859TZP133
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Hardware Specifications
中文描述: 硬件規(guī)格
文件頁(yè)數(shù): 27/92頁(yè)
文件大?。?/td> 1274K
代理商: MPC859TZP133
MOTOROLA
MPC866/859 Hardware Specifications
For More Information On This Product,
Go to: www.freescale.com
27
Bus Signal Timing
Figure 11 shows the timing for the input data controlled by the UPM for data beats where DLT3 = 1 in the
UPM RAM words. (This is only the case where data is latched on the falling edge of CLKOUT.)
Figure 11. Input Data Timing when Controlled by UPM in the Memory Controller and DLT3 = 1
Figure 12 through Figure 15 show the timing for the external bus read controlled by various GPCM factors.
Figure 12. External Bus Read Timing (GPCM Controlled—ACS = 00)
CLKOUT
TA
D[0:31],
DP[0:3]
B20
B21
CLKOUT
A[0:31]
CSx
OE
WE[0:3]
TS
D[0:31],
DP[0:3]
B11
B12
B23
B8
B22
B26
B19
B18
B25
B28
F
Freescale Semiconductor, Inc.
n
.
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