參數(shù)資料
型號: MPC875VR66
廠商: Freescale Semiconductor
文件頁數(shù): 9/84頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC 66MHZ 256PBGA
標(biāo)準(zhǔn)包裝: 60
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 66MHz
電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(23x23)
包裝: 托盤
MPC875/MPC870 PowerQUICC Hardware Specifications, Rev. 4
Freescale Semiconductor
17
Bus Signal Timing
11 Bus Signal Timing
The maximum bus speed supported by the MPC875/MPC870 is 80 MHz. Higher-speed parts must be
operated in half-speed bus mode (for example, an MPC875/MPC870 used at 133 MHz must be configured
for a 66 MHz bus). Table 8 shows the frequency ranges for standard part frequencies in 1:1 bus mode, and
Table 9 shows the frequency ranges for standard part frequencies in 2:1 bus mode.
Table 10 provides the bus operation timing for the MPC875/MPC870 at 33, 40, 66, and 80 MHz.
The timing for the MPC875/MPC870 bus shown Table 10, assumes a 50-pF load for maximum delays and
a 0-pF load for minimum delays. CLKOUT assumes a 100-pF load maximum delay
Table 8. Frequency Ranges for Standard Part Frequencies (1:1 Bus Mode)
Part Frequency
66 MHz
80 MHz
Min
Max
Min
Max
Core frequency
40
66.67
40
80
Bus frequency
40
66.67
40
80
Table 9. Frequency Ranges for Standard Part Frequencies (2:1 Bus Mode)
Part Frequency
66 MHz
80 MHz
133 MHz
Min
Max
Min
Max
Min
Max
Core frequency
40
66.67
40
80
40
133
Bus frequency
20
33.33
20
40
20
66
Table 10. Bus Operation Timings
Num
Characteristic
33 MHz
40 MHz
66 MHz
80 MHz
Unit
Min
Max
Min
Max
Min
Max
Min
Max
B1
Bus period (CLKOUT), see Table 8
———
————
ns
B1a
EXTCLK to CLKOUT phase skew—If
CLKOUT is an integer multiple of EXTCLK,
then the rising edge of EXTCLK is aligned with
the rising edge of CLKOUT. For a non-integer
multiple of EXTCLK, this synchronization is
lost, and the rising edges of EXTCLK and
CLKOUT have a continuously varying phase
skew.
–2
+2
–2
+2
–2
+2
–2
+2
ns
B1b
CLKOUT frequency jitter peak-to-peak
1
1
1
1
ns
B1c
Frequency jitter on EXTCLK
0.50
0.50
0.50
0.50
%
B1d
CLKOUT phase jitter peak-to-peak for
OSCLK
≥ 15 MHz
—4
4
—4
4
ns
CLKOUT phase jitter peak-to-peak for
OSCLK < 15 MHz
—5
5
—5
5
ns
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