- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9025 > MPC9351FAR2 (IDT, Integrated Device Technology Inc)IC PLL CLOCK DRIVER LV 32-LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | MPC9351FAR2 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL CLOCK DRIVER LV 32-LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | PLL 時(shí)鐘發(fā)生器 |
| PLL： | 帶旁路 |
| 輸入： | LVCMOS，LVPECL |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:9 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 200MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
MPC9351 REVISION 6 JANUARY 31, 2013
3
2013 Integrated Device Technology, Inc.
MPC9351 Data Sheet
LOW VOLTAGE PLL CLOCK DRIVER
Table 1. Pin Descriptions
Number
Name
Type
Description
PCLK, PCLK
Input
LVPECL
Differential clock reference
Low voltage positive ECL input
TCLK
Input
LVCMOS
Single ended reference clock signal or test clock
EXT_FB
Input
LVCMOS
Feedback signal input, connect to a QA, QB, QC, QD output
REF_SEL
Input
LVCMOS
Selects input reference clock
FSELA
Input
LVCMOS
Output A divider selection
FSELB
Input
LVCMOS
Output B divider selection
FSELC
Input
LVCMOS
Outputs C divider selection
FSELD
Input
LVCMOS
Outputs D divider selection
OE
Input
LVCMOS
Output enable/disable
QA
Output
LVCMOS
Bank A clock output
QB
Output
LVCMOS
Bank B clock output
QC0, QC1
Output
LVCMOS
Bank C clock outputs
QD0 – QD4
Output
LVCMOS
Bank D clock outputs
VCCA
Supply
VCC
Positive power supply for the PLL
VCC
Supply
VCC
Positive power supply for I/O and core
GND
Supply
Ground
Negative power supply
Table 2. Function Table
Control
Default
0
1
REF_SEL
0
Selects PCLK as reference clock
Selects TCLK as reference clock
PLL_EN
1
Test mode with PLL disabled. The input clock is
directly routed to the output dividers
PLL enabled. The VCO output is routed to the
output dividers
OE
0
Outputs enabled
Outputs disabled, PLL loop is open
VCO is forced to its minimum frequency
FSELA
0
QA = VCO
2
QA = VCO
4
FSELB
0
QB = VCO
4
QB = VCO
8
FSELC
0
QC = VCO
4
QC = VCO
8
FSELD
0
QD = VCO
4
QD = VCO
8
Table 3. Absolute Maximum Ratings(1)
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated
conditions is not implied.
Symbol
Characteristics
Min
Max
Unit
VCC
Supply Voltage
–0.3
4.6
V
VIN
DC Input Voltage
–0.3
VCC+0.3
V
VOUT
DC Output Voltage
–0.3
VCC+0.3
V
IIN
DC Input Current
20
mA
IOUT
DC Output Current
50
mA
TS
Storage Temperature
–55
150
°C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-B3D-MV-F1 | CONVERTER MOD DC/DC 85V 150W |
| VE-B3B-MV-F4 | CONVERTER MOD DC/DC 95V 150W |
| MPC9351ACR2 | IC PLL CLOCK DRIVER LV 32-LQFP |
| IDT23S09E-1HPGGI8 | IC CLK BUFFER ZD HI DRV 16-TSSOP |
| IDT23S09E-1HDCGI8 | IC CLK BUFFER ZD HI DRV 16-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC9352 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.3V / 2.5V 1:11 LVCMOS ZERO DELAY CLOCK GENERATOR |
| MPC9352AC | 功能描述:鎖相環(huán) - PLL 3.3V 240MHz Clock Generator RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MPC9352ACR2 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 FSL 1-11 LVCMOS PLL Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9352FA | 功能描述:鎖相環(huán) - PLL 2.5 3.3V 200MHz Clock Generator RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MPC9352FAR2 | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Generator Single 32-Pin LQFP T/R 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK GEN SGL 32LQFP - Tape and Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。