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參數(shù)資料
| 型號： | MPIC2130P |
| 廠商： | MOTOROLA INC |
| 元件分類： | MOSFETs |
| 英文描述： | 3-PHASE BRIDGE DRIVER |
| 中文描述： | 0.25 A BUF OR INV BASED MOSFET DRIVER, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 179K |
| 代理商： | MPIC2130P |
3
Motorola Power Products Division Advanced Data
RECOMMENDED OPERATING CONDITIONS
The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi-
tions. The VS offset rating is tested with all supplies biased at 15 V differential.
High Side Floating Supply Absolute Voltage
VB1,2,3
VS1,2,3
VHO1,2,3
VCC
VSO
VLO1,2,3
VIN
FAULT–
VS1,2,3+10
Note 1
VS1,2,3+20
VSO+600
VB1,2,3
20
V
High Side Floating Supply Offset Voltage
V
High Side Floating Output Voltage
VS1,2,3
10
V
Fixed Supply Voltage
V
Low Side Driver Return
–5
5
V
Low Side Output Voltage
VSO
VSS
VSS
VSS
VSS
–40
VCC
5
V
Logic Input Voltage (HIN–, LIN–, & ITRIP)
V
Fault Output Voltage
VCC
5
V
Amplifier Output Voltage
CAO
V
Amplifier Inverting Input Voltage
CA–
5
V
Ambient Temperature
TA
125
°
C
Note 1: Logic operational for VS of –5 V to +600 V. Logic state held for VS of VSO–5 V to VSO–VBS.
ELECTRICAL CHARACTERISTICS
(TA = 25
°
C unless otherwise specified)
Characteristic
Symbol
Min
Typ
Max
Unit
STATIC ELECTRICAL CHARACTERISTICS
VBIAS (VCC, VBS1,2,3) = 15 V and VSO = VSS unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are
applicable to all six channels (HS1,2,3 & LS1,2,3). The VO and IO parameters are referenced to VSO1,2,3 and are applicable to the respec-
tive output leads: HO1,2,3 or LO1,2,3.
Logic “0” Input Voltage (OUT = LO)
VIH
VIL
2.2
–
–
V
Logic “1” Input Voltage (OUT = HI)
–
–
0.8
V
ITRIP Input Positive Going Threshold
VIT,TH+
VOH
VOL
ILK
IQBS
IQCC
IIN+
IIN–
ITRIP+
ITRIP–
VBSUV+
VBSUV–
VCCUV+
VCCUV–
Ron,FLT
IO+
IO–
VOS
ICA–
CMRR
400
–
580
mV
High Level Output Voltage, VBIAS–VO @ VIN = 0 V, IO = 0 A
Low Level Output Voltage, VO @ VIN = 5 V, IO = 0 A
Offset Supply Leakage Current @ VB1,2,3 = VS1,2,3 = 600 V
Quiescent VBS Supply Current @ VIN = 0 V or 5 V
Quiescent VCC Supply Current @ VIN = 0 V or 5 V
Logic “1” Input Bias Current (OUT = HI) @ VIN = 0 V
Logic “0” Input Bias Current (OUT = LO) @ VIN = 5 V
“High” ITRIP Bias Current @ ITRIP = 5 V
–
–
100
mV
–
–
100
mV
–
–
50
μ
A
–
15
30
μ
A
–
3.0
4.0
mA
–
400
500
μ
A
–
200
320
μ
A
–
75
150
μ
A
“Low” ITRIP Bias Current @ ITRIP = 0 V
–
–
100
nA
VBS Supply Undervoltage Positive Going Threshold
VBS Supply Undervoltage Negative Going Threshold
VCC Supply Undervoltage Positive Going Threshold
VCC Supply Undervoltage Negative Going Threshold
FAULT – Low On Resistance
8.0
–
9.2
V
7.6
–
8.8
V
8.3
–
9.7
V
8.0
–
9.4
V
–
55
75
Output High Short Circuit Pulsed Current @ Vout = 0 V, Vin = 0 V, PW
≤
10
μ
s
Output Low Short Circuit Pulsed Current @ Vout = 15 V, Vin = 5 V, PW
≤
10
μ
s
Amplifier Input Offset Voltage @ VSO = CA– = 0.2
CA– Input Bias Current @ CA– = 2.5 V
200
250
–
mA
420
500
–
mA
–
–
30
mV
–
–
4.0
nA
Amplifier Common Mode Rejection Ratio @ VSO = CA– = 0.1 V & 5 V
60
80
–
dB
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