2–86
Motorola Sensor Device Data
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Connection to the A/D on an MCU
When using the accelerometer with the analog to digital
converter on an MCU, it is important to connect the supply
and ground pins of the accelerometer and the VRH and VRL
pins of the MCU to the same supply and ground traces,
respectively. This will maximize the ratiometricity of the
system by avoiding voltage differences that may result
from trace impedances.
Figure 2 shows the recommended supporting circuitry for
operating the new accelerometer. Part (a) shows the16 pin
DIP package version, the MMA1201P, while part (b) shows the
6 pin Wingback package version, the MMA2200W. For the
MMA1201P, pins 1, 2, 3, 6, 14, 15, and 16 have no internal
connections, and pins 9 through 13 are used for calibration
and trimming in the factory. These pins should all be left un-
connected. For the MMA2200W, pins 1 and 4, and the wings
(supporting pins) should be left unconnected.
VSS
ST
VDD
VOUT
5
2
6
3
MMA2200W
VCC
C1
LOGIC INPUT
R1
C2
OUTPUT SIGNAL
(b)
VSS
ST
VDD
VOUT
7
4
8
5
MMA1201P
VCC
C1
0.1 F
LOGIC INPUT
1k
R1
C2
OUTPUT SIGNAL
(a)
0.01 F
0.1 F
1k
0.01 F
Figure 2. Accelerometers with Recommended Supporting Circuitry
11 TRIM3
PSRR AND ALIASING GAIN MODEL
Although the operational amplifiers in the MMA1201P’s
control ASIC have a high power supply rejection ratio with a
fairly wide bandwidth, because the accelerometer is in reality
a sampled analog system using switched capacitor technol-
ogy, it is possible that when powered with a switching power
supply, noise from the supply will appear in the output signal.
This is known as aliasing, the result being a signal with fre-
quency equal to the difference between the frequency of the
power supply noise and the accelerometer’s sampling fre-
quency. Aliasing gain is defined as the power of the output
signal relative to an injected sinusoid on the VDD line powering
the accelerometer.
Typical switching power supplies have operating frequen-
cies between 50 and 100 kHz. The operating frequency of the
accelerometer’s switching capacitor circuitry is roughly 65
kHz. Should the fundamental frequency of the switching
power supply, or its harmonics, fall within 400 Hz of the ASIC’s
fundamental frequency (or its harmonics), then any noise
present in the power supply will be aliased into the passband
of the accelerometer. As will be explained later in this section,
there are several simple ways to avoid aliasing.
As shown in Figure 1, there are many different signal pro-
cessing stages in the ASIC. As a result, the aliasing gain
characteristics of the part are a little bit more complex than
explained in the previous paragraph. An analysis was done to
characterize the worst case aliasing gain of the accelerome-
ter. Devices from three production lots were used. The parts
were tested at 105 C with 5.25 V on VDD. The gain code was
set to the nominal value plus 4
σ
. Thus, the parts had a sensi-
tivity that was approximately twice that of standard parts.
Figure 3, shows a plot of the aliasing gain model that was
developed. The model is based on the worst case results;
typical parts should perform much better having much lower
aliasing gain.
The following equation was used to fit the data and generate
the model:
Aliasing Gain = 1.6965 + 0.0029 * Freq. (kHz) + HRC1
* Freq. (kHz) + HRC2
where HRC1 and HRC2 are coefficients used in the model.
Their values vary for each harmonic. Figure 4 lists the values
of HRC1 and HRC2 for the fundamental frequency and the first
5 harmonics.
F
Freescale Semiconductor, Inc.
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