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| 型號(hào)： | MQ80C52EXXX-36/883D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44 |
| 封裝： | CERAMIC, QFP-44 |
| 文件頁(yè)數(shù)： | 47/141頁(yè) |
| 文件大小： | 7628K |
| 代理商： | MQ80C52EXXX-36/883D |
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225
8021G–AVR–03/11
ATmega329P/3290P
22.9
Register Description
22.9.1
ADMUX – ADC Multiplexer Selection Register
Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in Table 3. If these bits are
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see ”ADCL and ADCH – The ADC Data Register” on
Bits 4:0 – MUX4:0: Analog Channel Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC.
See Table 22-3 for details. If these bits are changed during a conversion, the change will not go
in effect until this conversion is complete (ADIF in ADCSRA is set).
Bit
765
4321
0
REFS1
REFS0
ADLAR
MUX4
MUX3
MUX2
MUX1
MUX0
ADMUX
Read/Write
R/W
Initial Value
000
0000
0
Table 3. Voltage Reference Selections for ADC
REFS1
REFS0
Voltage Reference Selection
0
AREF, Internal Voltage Reference turned off
0
1
AVCC with external capacitor at AREF pin
10
Reserved
1
Internal 1.1V Voltage Reference with external capacitor at AREF pin
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