76
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
The alternate pin configuration is as follows:
RESET – Port G, Bit 5
RESET: External Reset input. When the RSTDISBL Fuse is programmed (‘0’), PG5 will function as input with pull-
up always on.
T0 – Port G, Bit 4
T0, Timer/Counter0 Counter Source.
T1 – Port G, Bit 3
T1, Timer/Counter1 Counter Source.
14.3.6
Alternate functions of Port H
Port H is only present in Atmel ATmega3250A/3250PA/6450A/6450P. The alternate pin configuration is as follows:
Table 14-15. Overriding signals for alternate functions in PG4:PG3.
Signal name
PG4/T0
PG3/T1/
PUOE
0
PUOV
0
DDOE
0
DDOV
1
PVOE
0
PVOV
0
PTOE
–
DIEOE
0
DIEOV
0
DI
T0 INPUT
T1 INPUT
AIO
–
Table 14-16. Port H pins alternate functions.
Port pin
Alternate function
PH7
PCINT23(Pin Change Interrupt23)
PH6
PCINT22 (Pin Change Interrupt22)
PH5
PCINT21(Pin Change Interrupt21)
PH4
PCINT20(Pin Change Interrupt20)
PH3
PCINT19 (Pin Change Interrupt19)
PH2
PCINT18(Pin Change Interrupt18)
PH1
PCINT17(Pin Change Interrupt17)
PH0
PCINT16(Pin Change Interrupt16)