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參數(shù)資料
| 型號： | MQ83C154DXXX-12/883R |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44 |
| 文件頁數(shù)： | 174/242頁 |
| 文件大?。?/td> | 3080K |
| 代理商： | MQ83C154DXXX-12/883R |
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37
2588F–AVR–06/2013
ATtiny261/461/861
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
ones like the Timer Overflow. If wake-up from the Analog Comparator interrupt is not required,
the Analog Comparator can be powered down by setting the ACD bit in the Analog Comparator
Control and Status Register – ACSR. This will reduce power consumption in Idle mode. If the
ADC is enabled, a conversion starts automatically when this mode is entered.
7.1.2
ADC Noise Reduction Mode
When the SM1:0 bits are written to 01, the SLEEP instruction makes the MCU enter ADC Noise
Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, and the
Watchdog to continue operating (if enabled). This sleep mode halts clk
I/O, clkCPU, and clkFLASH,
while allowing the other clocks to run.
This mode improves the noise environment for the ADC, enabling higher resolution measure-
ments. If the ADC is enabled, a conversion starts automatically when this mode is entered. Apart
form the ADC Conversion Complete interrupt, only an External Reset, a Watchdog Reset, a
Brown-out Reset, an SPM/EEPROM ready interrupt, an external level interrupt on INT0 or a pin
change interrupt can wake up the MCU from ADC Noise Reduction mode.
7.1.3
Power-Down Mode
When the SM1:0 bits are written to 10, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the Oscillator is stopped, while the external interrupts, and the Watch-
dog continue operating (if enabled). Only an External Reset, a Watchdog Reset, a Brown-out
Reset, an external level interrupt on INT0, or a pin change interrupt can wake up the MCU. This
sleep mode halts all generated clocks, allowing operation of asynchronous modules, only.
7.1.4
Standby Mode
When the SM1:0 bits are written to 11 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-
down with the exception that the Oscillator is kept running. From Standby mode, the device
wakes up in six clock cycles.
7.2
Power Reduction Register
The Power Reduction Register (PRR), see “PRR – Power Reduction Register” on page 39, pro-
vides a method to stop the clock to individual peripherals to reduce power consumption. The
current state of the peripheral is frozen and the I/O registers can not be read or written.
Resources used by the peripheral when stopping the clock will remain occupied, hence the
peripheral should in most cases be disabled before stopping the clock. Waking up a module,
which is done by clearing the bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. In all other sleep modes, the clock is already stopped. See “Supply Current
of I/O modules” on page 197 for examples. In all other sleep modes, the clock is already
stopped.
7.3
Minimizing Power Consumption
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the device’s functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption.
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