參數(shù)資料
型號: MQ83C154DXXX-12/883R
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44
文件頁數(shù): 3/242頁
文件大?。?/td> 3080K
代理商: MQ83C154DXXX-12/883R
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100
2588F–AVR–06/2013
ATtiny261/461/861
The counter value (TCNT1) that is shown as a histogram in Figure 12-11 is incremented until the
counter value matches the TOP value. The counter is then cleared at the following clock cycle
The diagram includes the Waveform Output (OCW1x) in toggle Compare Mode. The small hori-
zontal line marks on the TCNT1 slopes represent Compare Matches between OCR1x and
TCNT1.
The Timer/Counter Overflow Flag (TOV1) is set in the same clock cycle as the TCNT1 becomes
zero. The TOV1 Flag in this case behaves like a 11th bit, except that it is only set, not cleared.
However, combined with the timer overflow interrupt, that automatically clears the TOV1 Flag,
the timer resolution can be increased by software. There are no special cases to consider in the
Normal mode, a new counter value can be written anytime.
The Output Compare Unit can be used to generate interrupts at some given time. Using the Out-
put Compare to generate waveforms in Normal mode is not recommended, since this will
occupy too much of the CPU time. For generating a waveform, the OCW1x output can be set to
toggle its logical level on each Compare Match by setting the Compare Output mode bits to tog-
gle mode (COM1x1:0 = 1). The OC1x value will not be visible on the port pin unless the data
direction for the pin is set to output. The waveform generated will have a maximum frequency of
f
OC1x = fclkT1/4 when OCR1C is set to zero. The waveform frequency is defined by the following
equation:
Resolution, R
PWM, shows how many bit is required to express the value in the OCR1C register
and it can be calculated using the following equation:
The Output Compare Pin configurations in Normal Mode are described in Table 12-2.
12.8.2
Fast PWM Mode
The fast Pulse Width Modulation or fast PWM mode (PWM1A/PWM1B = 1 and WGM11:10 = 00)
provides a high frequency PWM waveform generation option. The fast PWM differs from the
other PWM option by its single-slope operation. The counter counts from BOTTOM to TOP
(defined as OCR1C) then restarts from BOTTOM. In non-inverting Compare Output mode the
Waveform Output (OCW1x) is cleared on the Compare Match between TCNT1 and OCR1x and
set at BOTTOM. In inverting Compare Output mode, the Waveform Output is set on Compare
Match and cleared at BOTTOM. In complementary Compare Output mode the Waveform Output
is cleared on the Compare Match and set at BOTTOM.
Due to the single-slope operation, the operating frequency of the fast PWM mode can be twice
as high as the Phase and Frequency Correct PWM mode that use dual-slope operation. This
high frequency makes the fast PWM mode well suited for power regulation, rectification, and
Table 12-2.
Output Compare Pin Configurations in Normal Mode
COM1x1
COM1x0
OC1x Pin
0
Disconnected
0
1
Disconnected
OC1x
1
0
Disconnected
OC1x
1
Disconnected
OC1x
f
OC1x
f
clkT1
21
OCR1C
+
-------------------------------------------
=
R
PWM
log
2 OCR1C
1
+
=
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