117
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
16.11 Register description
16.11.1
TCCR1A – Timer/Counter1 Control Register A
Bit 7:6 – COM1A[1:0]: Compare Output Mode for Unit A
Bit 5:4 – COM1B[1:0]: Compare Output Mode for Unit B
The COM1A[1:0] and COM1B[1:0] control the Output Compare pins (OC1A and OC1B respectively) behavior. If
one or both of the COM1A[1:0] bits are written to one, the OC1A output overrides the normal port functionality of
the I/O pin it is connected to. If one or both of the COM1B[1:0] bit are written to one, the OC1B output overrides the
normal port functionality of the I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit
corresponding to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x[1:0] bits is dependent of the
WGM1[3:0] bits setting...
Table 16-2 shows the COM1x[1:0] bit functionality when the WGM1[3:0] bits are set to a
Normal or a CTC mode (non-PWM).
Table 16-3 shows the COM1x[1:0] bit functionality when the WGM1[3:0] bits are set to the fast PWM mode.
Note:
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In this case the compare
Bit
7
6
5
4
32
10
(0x80)
COM1A1
COM1A0
COM1B1
COM1B0
–
WGM11
WGM10
TCCR1A
Read/Write
R/W
RR
R/W
Initial Value
0
Table 16-2.
Compare Output Mode, non-PWM.
COM1A1/COM1B1
COM1A0/COM1B0
Description
0
Normal port operation, OC1A/OC1B disconnected.
0
1
Toggle OC1A/OC1B on Compare Match.
1
0
Clear OC1A/OC1B on Compare Match (Set output to low level).
1
Set OC1A/OC1B on Compare Match (Set output to high level).
Table 16-3.
Compare Output Mode, fast PWM
(1).
COM1A1/COM1B1
COM1A0/COM1B0
Description
0
Normal port operation, OC1A/OC1B disconnected.
01
WGM1[3:0] = 14 or 15: Toggle OC1A on Compare Match, OC1B
disconnected (normal port operation). For all other WGM1 settings, normal
port operation, OC1A/OC1B disconnected.
10
Clear OC1A/OC1B on Compare Match, set OC1A/OC1B at BOTTOM
(non-inverting mode)
11
Set OC1A/OC1B on Compare Match, clear OC1A/OC1B at BOTTOM
(inverting mode)