參數(shù)資料
型號(hào)： MR80C32-20/883:D
廠商： ATMEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, 20 MHz, MICROCONTROLLER, CQCC44
封裝： LCC-44
文件頁(yè)數(shù)： 87/103頁(yè)
文件大?。?/td> 25028K
177
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
UCSRnA Register. When using synchronous mode (UMSELn = 1), the Data Direction Register
for the XCKn pin (DDR_XCKn) controls whether the clock source is internal (Master mode) or
external (Slave mode). The XCKn pin is only active when using synchronous mode.
Figure 19-2 shows a block diagram of the clock generation logic.
Figure 19-2. Clock Generation Logic, block diagram.
Signal description:
txclk
Transmitter clock (Internal Signal).
rxclk
Receiver base clock (Internal Signal).
xcki
Input from XCK pin (internal Signal). Used for synchronous slave
operation.
xcko
Clock output to XCK pin (Internal Signal). Used for synchronous master
operation.
f
OSC
XTAL pin frequency (System Clock).
19.4.1
Internal Clock Generation – The Baud Rate Generator
Internal clock generation is used for the asynchronous and the synchronous master modes of
operation. The description in this section refers to Figure 19-2 on page 177.
The USART Baud Rate Register (UBRRn) and the down-counter connected to it function as a
programmable prescaler or baud rate generator. The down-counter, running at system clock
(f
osc), is loaded with the UBRRn value each time the counter has counted down to zero or when
the UBRRnL Register is written. A clock is generated each time the counter reaches zero. This
clock is the baud rate generator clock output (= f
osc/(UBRRn+1)). The Transmitter divides the
baud rate generator clock output by 2, 8, or 16 depending on mode. The baud rate generator
output is used directly by the Receiver’s clock and data recovery units. However, the recovery
units use a state machine that uses 2, 8, or 16 states depending on mode set by the state of the
UMSELn, U2Xn and DDR_XCKn bits.
Table 19-1 on page 178 contains equations for calculating the baud rate (in bits per second) and
for calculating the UBRRn value for each mode of operation using an internally generated clock
source.
Note:
1. The baud rate is defined to be the transfer rate in bit per second (bps)
BAUD
Baud rate (in bits per second, bps).
Prescaling
Down-Counter
/2
UBRR
/4
/2
fosc
UBRR+1
Sync
Register
OSC
XCK
Pin
txclk
U2X
UMSEL
DDR_XCK
0
1
0
1
xcki
xcko
DDR_XCK
rxclk
0
1
0
Edge
Detector
UCPOL
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