參數(shù)資料
型號: MR80C52CXXX-20
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù): 137/170頁
文件大?。?/td> 25028K
代理商: MR80C52CXXX-20
221
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
After all TWI Register updates and other pending application software tasks have been
completed, TWCR is written. When writing TWCR, the TWINT bit should be set. Writing a one
to TWINT clears the flag. The TWI will then commence executing whatever operation was
specified by the TWCR setting
In the following an assembly and C implementation of the example is given. Note that the code
below assumes that several definitions have been made, for example by using include-files.
Assembly code example
C example
Comments
1
ldi
r16, (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
out
TWCR, r16
TWCR = (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
Send START condition
2
wait1:
in
r16,TWCR
sbrs
r16,TWINT
rjmp
wait1
while
(!(TWCR & (1<<TWINT)))
;
Wait for TWINT Flag set. This
indicates that the START condition
has been transmitted
3
in
r16,TWSR
andi
r16, 0xF8
cpi
r16, START
brne
ERROR
if
((TWSR & 0xF8) != START)
ERROR();
Check value of TWI Status
Register. Mask prescaler bits. If
status different from START go to
ERROR
ldi
r16, SLA_W
out
TWDR, r16
ldi
r16, (1<<TWINT) | (1<<TWEN)
out
TWCR, r16
TWDR = SLA_W;
TWCR = (1<<TWINT) | (1<<TWEN);
Load SLA_W into TWDR Register.
Clear TWINT bit in TWCR to start
transmission of address
4
wait2:
in
r16,TWCR
sbrs
r16,TWINT
rjmp
wait2
while
(!(TWCR & (1<<TWINT)))
;
Wait for TWINT Flag set. This
indicates that the SLA+W has been
transmitted, and ACK/NACK has
been received.
5
in
r16,TWSR
andi
r16, 0xF8
cpi
r16, MT_SLA_ACK
brne
ERROR
if
((TWSR & 0xF8) !=
MT_SLA_ACK)
ERROR();
Check value of TWI Status
Register. Mask prescaler bits. If
status different from MT_SLA_ACK
go to ERROR
ldi
r16, DATA
out
TWDR, r16
ldi
r16, (1<<TWINT) | (1<<TWEN)
out
TWCR, r16
TWDR = DATA;
TWCR = (1<<TWINT) | (1<<TWEN);
Load DATA into TWDR Register.
Clear TWINT bit in TWCR to start
transmission of data
6
wait3:
in
r16,TWCR
sbrs
r16,TWINT
rjmp
wait3
while
(!(TWCR & (1<<TWINT)))
;
Wait for TWINT Flag set. This
indicates that the DATA has been
transmitted, and ACK/NACK has
been received.
7
in
r16,TWSR
andi
r16, 0xF8
cpi
r16, MT_DATA_ACK
brne
ERROR
if
((TWSR & 0xF8) !=
MT_DATA_ACK)
ERROR();
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
MT_DATA_ACK go to ERROR
ldi
r16, (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO)
out
TWCR, r16
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO);
Transmit STOP condition
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