參數(shù)資料
型號: MR80C52CXXX-20
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù): 91/170頁
文件大?。?/td> 25028K
代理商: MR80C52CXXX-20
180
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
Figure 19-4. Frame formats.
St
Start bit, always low.
(n)
Data bits (0 to 8).
P
Parity bit. Can be odd or even.
Sp
Stop bit, always high.
IDLE
No transfers on the communication line (RxDn or TxDn). An IDLE line
must be high.
The frame format used by the USART is set by the UCSZn2:0, UPMn1:0 and USBSn bits in
UCSRnB and UCSRnC. The Receiver and Transmitter use the same setting. Note that changing
the setting of any of these bits will corrupt all ongoing communication for both the Receiver and
Transmitter.
The USART Character SiZe (UCSZn2:0) bits select the number of data bits in the frame. The
USART Parity mode (UPMn1:0) bits enable and set the type of parity bit. The selection between
one or two stop bits is done by the USART Stop Bit Select (USBSn) bit. The Receiver ignores
the second stop bit. An FE (Frame Error) will therefore only be detected in the cases where the
first stop bit is zero.
19.5.1
Parity Bit Calculation
The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is used, the
result of the exclusive or is inverted. The relation between the parity bit and data bits is as
follows::
P
even
Parity bit using even parity.
P
odd
Parity bit using odd parity.
d
n
Data bit n of the character.
If used, the parity bit is located between the last data bit and first stop bit of a serial frame.
19.6
USART Initialization
The USART has to be initialized before any communication can take place. The initialization pro-
cess normally consists of setting the baud rate, setting frame format and enabling the
Transmitter or the Receiver depending on the usage. For interrupt driven USART operation, the
Global Interrupt Flag should be cleared and the USART interrupts should be disabled.
Before doing a re-initialization with changed baud rate or frame format, be sure that there are no
ongoing transmissions during the period the registers are changed. The TXCn Flag can be used
to check that the Transmitter has completed all transfers, and the RXC Flag can be used to
1
0
2
3
4
[5]
[6]
[7]
[8]
[P]
St
Sp1 [Sp2]
(St / IDLE)
(IDLE)
FRAME
P
even
d
n
1
d
3
d
2
d
1
d
0
P
odd
d
n
1
d
3
d
2
d
1
d
0
1
=
相關(guān)PDF資料
PDF描述
MQ80C32E-12/883 8-BIT, 12 MHz, MICROCONTROLLER, CQFP44
MQ80C52CXXX-20:R 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44
MQ80C52EXXX-25 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
MQ80C52TXXX-36SHXXX:RD 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44
MQ80C52XXX-20:R 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MR80C86 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor
MR80C86/B 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:Microprocessor, 16 Bit, 44 Pin, Ceramic, LCC
MR80C86-2 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor
MR80C86-2/883 制造商:Rochester Electronics LLC 功能描述:- Bulk
MR80C86-2/B 制造商:Intersil Corporation 功能描述:MPU 80C86 16BIT CMOS 8MHZ 44PLCC - Rail/Tube