參數(shù)資料
型號: MR80C52EXXX-36SHXXX:D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù): 90/91頁
文件大?。?/td> 19688K
5
32117D–AVR-01/12
AT32UC3C
2.
Overview
2.1
Block diagram
Figure 2-1.
Block diagram
supplied by VDDANA
PERIPHERAL
DMA
CONTROLLER
HSB-PB
BRIDGE B
HSB-PB
BRIDGE A
GENERAL
PURP
OS
E
IO
s
G
E
N
E
RA
LP
U
RP
O
S
E
IO
s
PA
PB
PC
PD
PA
PB
PC
PD
USB
INTERFACE
ID
VBOF
VBUS
D-
D+
CANIF
32 KHz OSC
RCSYS
OSC0 / OSC1
PLL0 / PLL1
JTAG
INTERFACE
MCKO
MDO[5..0]
MSEO[1..0]
EVTI_N
EVTO_N
TDI
RXLINE[0]
PB
HSB
TXLINE[0]
RXLINE[1]
TXCAN[1]
PERIPHERAL EVENT
CONTROLLER
PAD_EVT
MM
M
S
M
HIGH SPEED
BUS MATRIX
AVR32UC CPU
NEXUS
CLASS 2+
OCD
INSTR
INTERFACE
DATA
INTERFACE
ME
MOR
Y
IN
T
E
R
F
A
C
E
64/32/16
KB SRAM
MEMORY PROTECTION UNIT
LOCAL BUS
INTERFACE
M
4 KB
HSB
RAM
S
EXTERNAL
BU
S
INTE
R
FA
C
E
(S
D
R
AM
&
STATIC
MEMORY
C
O
NTROLLER)
CAS
RAS
SDA10
SDCK
SDCKE
SDWE
NCS[3..0]
NRD
NWAIT
NWE0
DATA[15..0]
ADDR[23..0]
NWE1
Memory
DMA
HSB-PB
BRIDGE C
PB
HSB
S
M
S
M
CONFIGURATION
REGISTERS
BUS
PBB
SERIAL
PERIPHERAL
INTERFACE 1
DM
A
MISO, MOSI
NPCS[3..0]
SCK
USART0
USART2
USART3
DM
A
RXD
TXD
CLK
RTS, CTS
TWCK
TWD
TWO-WIRE
INTERFACE 0/1
DM
A
PULSE WIDTH
MODULATION
CONTROLLER
DM
A
DIGITAL TO
ANALOG
CONVERTER 0/1
DM
A
DAC0A/B
ANALOG
COMPARATOR
0A/0B/1A/1B
AC0AP/N AC0BP/N
AC1AP/N AC1BP/N
DAC1A/B
I2S INTERFACE
DM
A
TIMER/COUNTER 1
A[2..0]
B[2..0]
CLK[2..0]
QUADRATURE
DECODER
0/1
QEPA
QEPB
QEPI
XIN32
XOUT32
XIN[1:0]
XOUT[1:0]
TIMER/COUNTER 0
CLK[2..0]
A[2..0]
B[2..0]
ANALOG TO
DIGITAL
CONVERTER 0/1
DM
A
ADCIN[15..0]
ADCVREFP/N
USART1
DM
A
RXD
TXD
CLK
RTS, CTS
DSR, DTR, DCD, RI
PB
C
PBA
SERIAL
PERIPHERAL
INTERFACE 0
DM
A
SCK
MISO, MOSI
NPCS[3..0]
M
R
W
PWML[3..0]
PWMH[3..0]
ADCREF0/1
aWire
RESET_N
ASYNCHRONOUS
TIMER
WATCHDOG
TIMER
FREQUENCY METER
POWER MANAGER
RESET
CONTROLLER
SLEEP
CONTROLLER
CLOCK
CONTROLLER
SYSTEM CONTROL
INTERFACE
GCLK[1..0]
BODs (1.8V,
3.3V, 5V)
RC8M
AC0AOUT/AC0BOUT
AC1AOUT/AC1BOUT
External Interrupt
Controller
EXTINT[8:1]
NMI
TWO-WIRE
INTERFACE 2
DM
A
TWD
TWCK
ETHERNET
MAC
DMA
S
COL,
CRS,
RXD[3..0],
RX_CLK,
RX_DV,
RX_ER,
TX_CLK
MDC,
TXD[3..0],
TX_EN,
TX_ER,
SPEED
MDIO
M
512/
256/
128/64
KB
Flash
Controller
BCLK
IWS
ISDO
MCLK
LOCAL BUS
DACREF
ISDI
TMS
TCK
TDO
RC120M
EXT_FAULTS[1:0]
TWALM
USART4
DM
A
RXD
TXD
CLK
RTS, CTS
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