參數(shù)資料
型號(hào): MR83C154DTXXX-20/883
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
封裝: LCC-44
文件頁(yè)數(shù): 73/298頁(yè)
文件大?。?/td> 8529K
代理商: MR83C154DTXXX-20/883
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164
ATmega8A [DATASHEET]
8159E–AVR–02/2013
mitted, the TWINT Flag is set by hardware, and the status code in TWSR will be 0x08 (see Table 21-3). In order to
enter MT mode, SLA+W must be transmitted. This is done by writing SLA+W to TWDR. Thereafter the TWINT bit
should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing the following value
to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received, TWINT is set again and a
number of status codes in TWSR are possible. Possible status codes in Master mode are 0x18, 0x20, or 0x38. The
appropriate action to be taken for each of these status codes is detailed in Table 21-3.
When SLA+W has been successfully transmitted, a data packet should be transmitted. This is done by writing the
data byte to TWDR. TWDR must only be written when TWINT is high. If not, the access will be discarded, and the
Write Collision bit (TWWC) will be set in the TWCR Register. After updating TWDR, the TWINT bit should be
cleared (by writing it to one) to continue the transfer. This is accomplished by writing the following value to TWCR:
This scheme is repeated until the last byte has been sent and the transfer is ended by generating a STOP condi-
tion or a repeated START condition. A STOP condition is generated by writing the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
Table 21-2.
After a repeated START condition (state 0x10) the Two-wire Serial Interface can access the same
Slave again, or a new Slave without transmitting a STOP condition. Repeated START enables the
Master to switch between Slaves, Master Transmitter mode and Master Receiver mode without los-
ing control of the bus:
TWCR
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
TWIE
value
1
X0
0
X1
0
X
TWCR
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
TWIE
value
1
X0
0
X1
0
X
TWCR
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
TWIE
value
1
X0
1
X1
0
X
TWCR
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
TWIE
value
1
X1
0
X1
0
X
Table 21-3.
Status codes for Master Transmitter Mode
Status Code
(TWSR)
Prescaler Bits
are 0
Status of the Two-wire Serial
Bus and Two-wire Serial Inter-
face Hardware
Application Software Response
Next Action Taken by TWI Hardware
To/from TWDR
To TWCR
STA
STO
TWINT
TWEA
0x08
A START condition has been
transmitted
Load SLA+W
0
1
X
SLA+W will be transmitted;
ACK or NOT ACK will be received
0x10
A repeated START condition
has been transmitted
Load SLA+W or
Load SLA+R
0
1
X
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+R will be transmitted;
Logic will switch to Master Receiver mode
0x18
SLA+W has been transmitted;
ACK has been received
Load data byte or
No TWDR action or
No TWDR action
0
1
0
1
0
1
X
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
相關(guān)PDF資料
PDF描述
MD83C154CXXX-25/883 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
MD80C52CXXX-12SCD 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40
MF180C51C-25D 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP44
MF280C51C-36R 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQFP44
MQ80C52TXXX-16SC 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
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