37
AT90PWM216/316 [DATASHEET]
7710H–AVR–07/2013
7.5
Power Reduction Register
The Power Reduction Register, PRR, provides a method to stop the clock to individual peripherals to reduce power
consumption. The current state of the peripheral is frozen and the I/O registers can not be read or written.
Resources used by the peripheral when stopping the clock will remain occupied, hence the peripheral should in
most cases be disabled before stopping the clock. Waking up a module, which is done by clearing the bit in PRR,
puts the module in the same state as before shutdown.
A full predictable behavior of a peripheral is not guaranteed during and after a cycle of stopping and starting of its
clock. So its recommended to stop a peripheral before stopping its clock with PRR register.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall power consump-
tion. In all other sleep modes, the clock is already stopped.
7.5.1
Power Reduction Register - PRR
Bit 7 - PRPSC2: Power Reduction PSC2
Writing a logic one to this bit reduces the consumption of the PSC2 by stopping the clock to this module. When
waking up the PSC2 again, the PSC2 should be re initialized to ensure proper operation.
Bit 6 - PRPSC1: Power Reduction PSC1
Writing a logic one to this bit reduces the consumption of the PSC1 by stopping the clock to this module. When
waking up the PSC1 again, the PSC1 should be re initialized to ensure proper operation.
Bit 5 - PRPSC0: Power Reduction PSC0
Writing a logic one to this bit reduces the consumption of the PSC0 by stopping the clock to this module. When
waking up the PSC0 again, the PSC0 should be re initialized to ensure proper operation.
Bit 4 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit reduces the consumption of the Timer/Counter1 module. When the Timer/Counter1 is
enabled, operation will continue like before the setting of this bit.
Bit 3 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit reduces the consumption of the Timer/Counter0 module. When the Timer/Counter0 is
enabled, operation will continue like before the setting of this bit.
Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface
Writing a logic one to this bit reduces the consumption of the Serial Peripheral Interface by stopping the clock to
this module. When waking up the SPI again, the SPI should be re initialized to ensure proper operation.
Bit 1 - PRUSART0: Power Reduction USART0
Writing a logic one to this bit reduces the consumption of the USART by stopping the clock to this module. When
waking up the USART again, the USART should be re initialized to ensure proper operation.
Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit reduces the consumption of the ADC by stopping the clock to this module. The ADC
must be disabled before using this function. The analog comparator cannot use the ADC input MUX when the clock
of ADC is stopped.
Bit
7
6
543
2
1
0
PRPSC2
PRPSC1
PRPSC0
PRTIM1
PRTIM0
PRSPI
PRUSART
PRADC
PRR
Read/Write
R/W
Initial Value
0