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參數(shù)資料
| 型號： | MS52C181A |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 131,072-Word × 8-Bit STATIC RAM +1,048,576-Word × 8-Bit One Time PROM(128k字×8位靜態(tài)RAM+1M字×8位 OTPROM) |
| 中文描述： | 131,072詞× 8位靜態(tài)RAM 1048576，字× 8位一次性可編程（128K的字× 8位靜態(tài)RAM的100萬字× 8位OTPROM） |
| 文件頁數(shù)： | 10/18頁 |
| 文件大?。?/td> | 125K |
| 代理商： | MS52C181A |
MS52C181A
SRAM Read Cycle
SRAM Timing Diagrams
10
A0 - A16
t
RC
CEs
t
AA
t
CO
t
CLZ
t
OLZ
t
OH
t
CHZ
OE
t
OE
t
OHZ
Valid Data-Out
I/O0 - I/O7
Notes : 1. A read cycle of SRAM occurs during the overlap of CEo="H", CEs="L", OE="L" and WE="H".
2.
t
OHZ ,
t
CHZ are specified by the time when DATA is floating , not defined by the output level.
SRAM Write Cycle
t
WC
t
WP
t
WHZ
t
WLZ
Data-In
t
CW
t
AW
t
AS
t
WR
t
DH
t
DS
A0 - A16
CEs
WE
Din
Dout
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS52C182A | 65,536-Word × 16-Bit or 131,072-Word × 8-Bit STATIC RAM +524,288-Word × 16-Bit or 1,048,576-Word × 8-Bit One Time PROM(64k字×16位或128k字×8位靜態(tài)RAM+512k字×16位或1M字×8位 OTPROM) |
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