- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25639 > MS80C51-12D (ATMEL CORP) 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號： | MS80C51-12D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 55/80頁 |
| 文件大?。?/td> | 5152K |
| 代理商： | MS80C51-12D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁當(dāng)前第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
255
XMEGA A [MANUAL]
8077I–AVR–11/2012
23.
AES and DES Crypto Engines
23.1
Features
Data Encryption Standard (DES) CPU instruction
Advanced Encryption Standard (AES) crypto module
DES Instruction
– Encryption and decryption
– DES supported
– Encryption/decryption in 16 CPU clock cycles per 8-byte block
AES crypto module
– Encryption and decryption
– Supports 128-bit keys
– Supports XOR data load mode to the state memory
– Encryption/decryption in 375 clock cycles per 16-byte block
23.2
Overview
The Advanced Encryption Standard (AES) and Data Encryption Standard (DES) are two commonly used standards for
cryptography. These are supported through an AES peripheral module and a DES CPU instruction, and the
communication interfaces and the CPU can use these for fast, encrypted communication and secure data storage.
DES is supported by an instruction in the AVR CPU. The 8-byte key and 8-byte data blocks must be loaded into the
register file, and then the DES instruction must be executed 16 times to encrypt/decrypt the data block.
The AES crypto module encrypts and decrypts 128-bit data blocks with the use of a 128-bit key. The key and data must
be loaded into the key and state memory in the module before encryption/decryption is started. It takes 375 peripheral
clock cycles before the encryption/decryption is done. The encrypted/encrypted data can then be read out, and an
optional interrupt can be generated. The AES crypto module also has DMA support with transfer triggers when
encryption/decryption is done and optional auto-start of encryption/decryption when the state memory is fully loaded.
23.3
DES Instruction
The DES instruction is a single cycle instruction. In order to decrypt or encrypt a 64-bit (8-byte) data block, the instruction
has to be executed 16 times.
The data and key blocks must be loaded into the register file before encryption/decryption is started. The 64-bit data
block (plaintext or ciphertext) is placed in registers R0-R7, where the LSB of data is placed in R0 and the MSB of data is
placed in R7. The full 64-bit key (including parity bits) is placed in registers R8-R15, with the LSB of the key in R8 and the
MSB of the key in R15.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT80C51T-16R | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44 |
| MD80C32E-20SC | 8-BIT, 20 MHz, MICROCONTROLLER, CDIP40 |
| MC80C52XXX-16SHXXX | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| MD80C52EXXX-20 | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
| MR80C52CXXX-12SHXXX | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MS8100 | 制造商:MCC 制造商全稱:Micro Commercial Components 功能描述:8 Amp Schottky Barrier Rectifier 20 to 100 Volts |
| MS8100.D | 制造商:Colibrys SA 功能描述:MEMS CAPACITIVE ACCELEROMETERS - Trays |
| MS8104160 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:(262,214-word x 8-Bits) x 2 Dual FIFO |
| MS8104160A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Dual FIFO (262,214 Words 】 8 Bits) 】 2 |
| MS8104160A-XXTB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Dual FIFO (262,214 Words 】 8 Bits) 】 2 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。