參數(shù)資料
型號(hào): MSC8144VT1000A
廠商: Freescale Semiconductor
文件頁數(shù): 51/80頁
文件大?。?/td> 0K
描述: IC DSP QUAD 1GHZ 783FCPBGA
標(biāo)準(zhǔn)包裝: 1
系列: StarCore
類型: SC3400 內(nèi)核
接口: 以太網(wǎng),I²C,SPI,TDM,UART,UTOPIA
時(shí)鐘速率: 1.0GHz
非易失內(nèi)存: 外部
芯片上RAM: 10.5MB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.00V
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
55
2.6.10.2
MII Transmit AC Timing Specifications
Table 41 provides the MII transmit AC timing specifications.
Figure 25 shows the MII transmit AC timing diagram.
2.6.10.3
MII Receive AC Timing Specifications
Table 42 provides the MII receive AC timing specifications.
Figure 24. MII Management Interface Timing
Table 41. MII Transmit AC Timing Specifications
Parameter/Condition
Symbol 1
Min
Max
Unit
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
tMTKHDX
025
ns
Notes:
1.
Typical TX_CLK period (tMTX) for 10 Mbps is 400 ns and for 100 Mbps is 40 ns.
2.
Program GCR4 as 0x00030CC3.
Figure 25. MII Transmit AC Timing
Table 42. MII Receive AC Timing Specifications
Parameter/Condition
Symbol 1
Min
Max
Unit
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
tMRDVKH
10.0
ns
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
tMRDXKH
2—
ns
Notes:
1.
Typical RX_CLK period (tMRX) for 10 Mbps is 400 ns and for 100 Mbps is 40 ns.
2.
Program GCR4 as 0x00030CC3.
ETHMDC
ETHMDIO
(Input)
(Output)
tMDC
tMDDXKH
tMDDVKH
tMDKHDX
TX_CLK
TXD[3:0]
tMTKHDX
TX_EN
TX_ER
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