參數(shù)資料
型號: MSC8144VT800B
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 133 MHz, OTHER DSP, PBGA783
封裝: 29 X 29 MM, LEAD FREE, PLASTIC, FCPBGA-783
文件頁數(shù): 56/80頁
文件大?。?/td> 1250K
代理商: MSC8144VT800B
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
6
1.2
Signal List By Ball Location
Table 1 presents the signal list sorted by ball number. The functionality of multi-functional (multiplexed) pins is separated for
each mode. When designing a board, make sure that the reference supply for each signal is appropriately considered. The
specified reference supply must be tied to the voltage level specified in this document if any of the related signal functions are
used (active).
Table 1. Signal List by Ball Number
Ball
Number
Signal Name
Power-
On
Reset
Value
I/O Multiplexing Mode2
Ref.
Supply
0 (000)
1 (001)
2 (010)
3 (011)
4 (100)
5 (101)
6 (110)
7 (111)
A2
GND
A3
GE2_RX_ER/PCI_AD31
Ethernet 2
PCI
Ethernet 2
VDDGE2
A4
VDDGE2
A5
GE2_RX_DV/PCI_AD30
Ethernet 2
PCI
Ethernet 2
VDDGE2
A6
GE2_TD0/PCI_CBE0
Ethernet 2
PCI
Ethernet 2
VDDGE2
A7
SRIO_IMP_CAL_RX
VDDSXC
A8
Reserved1
A9
Reserved1
A10
Reserved1
A11
Reserved1
A12
SRIO_RXD0
VDDSXC
A13
VDDSXC
A14
SRIO_RXD1
VDDSXC
A15
VDDSXC
A16
SRIO_REF_CLK
VDDSXC
A17
VDDRIOPLL
GNDRIOPLL
A18
GNDSXC
A19
SRIO_RXD2/
GE1_SGMII_RX
SGMII support on SERDES is enabled by Reset Configuration Word
VDDSXC
A20
VDDSXC
A21
SRIO_RXD3/
GE2_SGMII_RX
SGMII support on SERDES is enabled by Reset Configuration Word
VDDSXC
A22
VDDSXC
A23
SRIO_IMP_CAL_TX
VDDSXP
A24
MDQ28
VDDDDR
A25
MDQ29
VDDDDR
A26
MDQ30
VDDDDR
A27
MDQ31
VDDDDR
A28
MDQS3
VDDDDR
B1
Reserved1
B2
GE2_TD1/PCI_CBE1
Ethernet 2
PCI
Ethernet 2
VDDGE2
B3
GE2_TX_EN/PCI_CBE2
Ethernet 2
PCI
Ethernet 2
VDDGE2
B4
GE_MDIO
Ethernet
VDDGE2
B5
GND
B6
GE_MDC
Ethernet
VDDGE2
B7
GNDSXC
B8
Reserved1
B9
Reserved1
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