參數(shù)資料
型號(hào)： MSC8256SVT1000B
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 0-BIT, OTHER DSP, PBGA783
封裝： 29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783
文件頁(yè)數(shù)： 40/68頁(yè)
文件大?。?/td> 910K
代理商： MSC8256SVT1000B
Electrical Characteristics
MSC8256 Six-Core Digital Signal Processor Data Sheet, Rev. 3
Freescale Semiconductor
45
2.6.3
TDM Timing
Table 31 provides the input and output AC timing specifications for the TDM interface.
Figure 20 shows the TDM receive signal timing.
Table 31. TDM AC Timing Specifications for 62.5 MHz1
Parameter
Symbol2
Min
Max
Unit
TDMxRCK/TDMxTCK
tDM
16.0
—
ns
TDMxRCK/TDMxTCK high pulse width
tDM_HIGH
7.0
—
ns
TDMxRCK/TDMxTCK low pulse width
tDM_LOW
7.0
—
ns
TDM all input setup time
tDMIVKH
3.6
—
ns
TDMxRD hold time
tDMRDIXKH
1.9
—
ns
TDMxTFS/TDMxRFS input hold time
tDMFSIXKH
1.9
—
ns
TDMxTCK High to TDMxTD output active
tDM_OUTAC
2.5
—
ns
TDMxTCK High to TDMxTD output valid
tDMTKHOV
—9.8
ns
TDMxTD hold time
tDMTKHOX
2.5
—
ns
TDMxTCK High to TDMxTD output high impedance
tDM_OUTHI
—9.8
ns
TDMxTFS/TDMxRFS output valid
tDMFSKHOV
—9.25
ns
TDMxTFS/TDMxRFS output hold time
tDMFSKHOX
2.0
—
ns
Notes:
1.
The symbols used for timing specifications follow the pattern t(first two letters of functional block)(signal)(state)(reference)(state) for inputs
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tHIKHOX symbolizes the output internal
timing (HI) for the time tserial memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
2.
Output values are based on 30 pF capacitive load.
3.
Inputs are referenced to the sampling that the TDM is programmed to use. Outputs are referenced to the programming edge
they are programmed to use. Use of the rising edge or falling edge as a reference is programmable. TDMxTCK and TDMxRCK are
shown using the rising edge.
4.
All values are based on a maximum TDM interface frequency of 62.5 MHz.
Figure 20. TDM Receive Signals
TDMxRCK
TDMxRD
TDMxRFS
TDMxRFS (output)
~ ~
tDM
tDM_HIGH
tDM_LOW
tDMIVKH
tDMRDIXKH
tDMFSIXKH
tDMFSKHOV
tDMFSKHOX
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