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參數(shù)資料
| 型號(hào)： | MSM58321RS |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類(lèi)： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-16 |
| 文件頁(yè)數(shù)： | 15/16頁(yè) |
| 文件大?。?/td> | 121K |
| 代理商： | MSM58321RS |
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Semiconductor
MSM58321
14
3
Name
Pin No.
Description
READ
READ pin is used to read data; it is activated when it is at the H level. Address
contents are latched with ADDRESS LATCH inside the IC at the D0 ~ D3 and
ADDRESS WRITE pins to select the object digit, then an H-level signal is input
to the READ pin to read data.
If a count operation is continued by setting the STOP input to the L level, read
operation must be performed, in principle, while the BUSY output is at the H
level. While the BUSY output is at the L level, count operations are performed
by digit counters and read data is not guaranteed, therefore, read operations are
inhibited in this period. Figure 2 shows a time chart of the BUSY output, 1 Hz
signal inside the IC, and READ input.
A read operation is stopped temporarily within a period of 244 s from the BUSY
output trailing edge and it is restarted when the BUSY output goes to the H level
again.
If the counter operation is stopped by setting the STOP input to the H level, read
operations are enabled regardless of the BUSY output.
A read operation is enabled by microcomputer software regardless of the BUSY
output during the counter operation by setting the STOP input to the L level.
In this method, read operations are performed two or more times continuously
and data that matches twice is used as guaranteed data.
427 s
BUSY
1 Hz (inside IC)
Read-enabled
period
The counter inside the IC
starts counting at the
1 Hz signal leading edge.
244 s
122 s 61 s
Read-enabled period
Read operation is enabled in this period:
however, it is used for program switching.
READ input
Read-inhibited period
1 sec
Figure 2
BUSY
1 Hz (inside IC)
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