參數(shù)資料
型號： MSM6542-02RS
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 0 TIMER(S), REAL TIME CLOCK, PDIP18
封裝： 0.300 INCH, PLASTIC, DIP-18
文件頁數(shù)： 13/54頁
文件大小： 406K
代理商： MSM6542-02RS
Semiconductor
MSM6542-01/02/03
87
c)
IT/PLS
1 (D2) (InTerrupt/PuLSe 1)
This bit determines a mode for periodic output. When the bit is 1, a low-level interrupt
request is output from the INTERRUPT OUT pin for the MSM6542-01/02 or from the
PERIODIC OUT pin for the MSM6542-3. When the bit is 0, a low-level pulse is output. In
this case, the MASK
1 bit is 0. The output periods of interrupt output and pulse output are
determined by the setting of the C
D' register.
d)
IT/PLS
2 (D3) (InTerrupt/PuLSe 2)
This bit determines a mode for alarm output. When the bit is 1, a low-level alarm interrupt
request is output from the INTERRUPT OUT pin for the MSM6542-01/02 or from the
ALARM OUT pin for the MSM6542-03. When the bit is 0, a low-level pulse is output. In
this case, the MASK
2 bit is 0. When the contents of the alarm register match those of the
realtime counter within the range specified by the A-ENABLE register, an output wave-
form is provided.
In the alarm pulse output mode, the low level of a pulse lasts for about 61
s.
C
E register (Control E register)
a)
IRQ FLAG
1 (D0) (Interrupt ReQuest FLAG1)
The status of this bit depends on the hardware output, low or open, from the PERIODIC
OUT pin for the MSM6542-3 or INTERRUPT OUT pin which uses carry as a trigger for the
MSM6542-1/2. When hardware output is low, the bit is set at 1. When it is open, the bit
is set at 0.
The IRQ FLAG
1 bit is mainly used to indicate that there is an interrupt request for the
microcomputer. When the period set by the D
2 (CY2), D1 (CY1), and D0 (CY0) bits of the CD'
register expires with the D
0 (MASK1) bit of the CD register set at 0, output from the IN-
TERRUPT OUT pin changes from open to low. At the same time, the IRQ FLAG
1 bit
changes from 0 to 1.
When the D
2 (IT/PLS1) bit of the CD register is 1 (interrupt mode), the IRQ FLAG1 bit remains
at 1 (hardware output is low) until the bit is read. When the bit is read, it is cleared.
However, when the IRQ FLAG
1 bit is read whithin about 122 s of occurrence of an
interrupt with the D
0 (DP) bit of the CE' register set at 1, the IRQ FLAG1 bit is not cleared
immediately. It is cleared about 122
s after the interrupt occurs. When the bit is read at
least about 122
s after an interrupt occurs, it is cleared immediately.
In the interrupt mode, writing 0 in the IRQ FLAG
1 bit does not clear the bit. When another
interrupt occurs with the bit set at 1, it is ignored.
When the D
2 (IT/PLS1) bit of the CD register is 0 (periodic pulse output mode), the IRQ
FLAG
1 bit remains at 1 (hardware output is low) until 0 is written in the bit or the automatic
restoration time determined by the period set by the D
2 (CY2), D1 (CY1), and D0 (CY0) bits
of the C
D' register expires. When the IRQ FLAG1 bit is read in the periodic pulse output
mode, it is not cleared.
相關(guān)PDF資料
PDF描述
MSM6542-03GS-VK 0 TIMER(S), REAL TIME CLOCK, PDSO24
MSM6542-03RS 0 TIMER(S), REAL TIME CLOCK, PDIP24
MSM65513-GS-VK 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP64
MSM65513-JS 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC68
MSM65513-XXSS 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP64
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MSM6542-03 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:REAL TIME CLOCK WITH PERIODIC AND ALARM OUTPUT
MSM6544 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:42-DOT LCD DRIVER
MSM6544GS-2KR1 制造商:ROHM Semiconductor 功能描述:
MSM6545 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Operatable at 0.9 V and Built-in Buzzer Circuit 4-Bit Microcontroller
MSM6545L 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Operatable at 0.9 V and Built-in Buzzer Circuit 4-Bit Microcontroller
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*